Module d1_pac::ccu::cpu_axi_cfg
source · Expand description
CPU_AXI Configuration Register
Structs§
- CPU_AXI Configuration Register
- Register
cpu_axi_cfgreader - Register
cpu_axi_cfgwriter
Enums§
- Clock Source Select
- PLL Output External Divider P
Type Aliases§
- Field
cpu_clk_selreader - Clock Source Select - Field
cpu_clk_selwriter - Clock Source Select - Field
cpu_div1reader - Factor M - Field
cpu_div1writer - Factor M - Field
cpu_div2reader - Factor N - Field
cpu_div2writer - Factor N - Field
pll_cpu_out_ext_divpreader - PLL Output External Divider P - Field
pll_cpu_out_ext_divpwriter - PLL Output External Divider P