Module d1_pac::ccu::pll_audio0_ctrl
source · Expand description
PLL_AUDIO0 Control Register
Structs§
- PLL_AUDIO0 Control Register
- Register
pll_audio0_ctrlreader - Register
pll_audio0_ctrlwriter
Enums§
- PLL Lock Status
- Lock Enable
- PLL Enable
- LDO Enable
- PLL Lock Level
- PLL Output Gating Enable
- PLL SDM Enable
- PLL Unlock Level
Type Aliases§
- Field
lock_enablereader - Lock Enable - Field
lock_enablewriter - Lock Enable - Field
lockreader - PLL Lock Status - Field
pll_enreader - PLL Enable - Field
pll_enwriter - PLL Enable - Field
pll_input_div2reader - PLL Input Div M1 - Field
pll_input_div2writer - PLL Input Div M1 - Field
pll_ldo_enreader - LDO Enable - Field
pll_ldo_enwriter - LDO Enable - Field
pll_lock_mdselreader - PLL Lock Level - Field
pll_lock_mdselwriter - PLL Lock Level - Field
pll_nreader - PLL N - Field
pll_nwriter - PLL N - Field
pll_output_div2reader - PLL Output Div M0 - Field
pll_output_div2writer - PLL Output Div M0 - Field
pll_output_gatereader - PLL Output Gating Enable - Field
pll_output_gatewriter - PLL Output Gating Enable - Field
pll_preader - PLL Post-div P - Field
pll_pwriter - PLL Post-div P - Field
pll_sdm_enreader - PLL SDM Enable - Field
pll_sdm_enwriter - PLL SDM Enable - Field
pll_unlock_mdselreader - PLL Unlock Level - Field
pll_unlock_mdselwriter - PLL Unlock Level