Module d1_pac::ccu::pll_audio1_ctrl
source · Expand description
PLL_AUDIO1 Control Register
Structs§
- PLL_AUDIO1 Control Register
- Register
pll_audio1_ctrl
reader - Register
pll_audio1_ctrl
writer
Enums§
- PLL Lock Status
- Lock Enable
- PLL Enable
- LDO Enable
- PLL Lock Level
- PLL Output Gating Enable
- PLL SDM Enable
- PLL Unlock Level
Type Aliases§
- Field
lock_enable
reader - Lock Enable - Field
lock_enable
writer - Lock Enable - Field
lock
reader - PLL Lock Status - Field
pll_en
reader - PLL Enable - Field
pll_en
writer - PLL Enable - Field
pll_input_div2
reader - PLL Input Div M - Field
pll_input_div2
writer - PLL Input Div M - Field
pll_ldo_en
reader - LDO Enable - Field
pll_ldo_en
writer - LDO Enable - Field
pll_lock_mdsel
reader - PLL Lock Level - Field
pll_lock_mdsel
writer - PLL Lock Level - Field
pll_n
reader - PLL N - Field
pll_n
writer - PLL N - Field
pll_output_gate
reader - PLL Output Gating Enable - Field
pll_output_gate
writer - PLL Output Gating Enable - Field
pll_p0
reader - PLL Output Div P0 - Field
pll_p0
writer - PLL Output Div P0 - Field
pll_p1
reader - PLL Output Div P1 - Field
pll_p1
writer - PLL Output Div P1 - Field
pll_sdm_en
reader - PLL SDM Enable - Field
pll_sdm_en
writer - PLL SDM Enable - Field
pll_unlock_mdsel
reader - PLL Unlock Level - Field
pll_unlock_mdsel
writer - PLL Unlock Level