Module d1_pac::csic::csic_dma::csic_dma_f1_bufa

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CSIC DMA FIFO 1 Output Buffer-A Address Register

Structs§

  • CSIC_DMA_F1_BUFA_SPEC
    CSIC DMA FIFO 1 Output Buffer-A Address Register
  • R
    Register csic_dma_f1_bufa reader
  • W
    Register csic_dma_f1_bufa writer

Type Aliases§

  • F1_BUFA_R
    Field f1_bufa reader - When BK_TOP_EN is enabled, FBC_EN is enabled, DMA_EN is disabled, these bits indicate the output address of compressed data in FBC mode.
  • F1_BUFA_W
    Field f1_bufa writer - When BK_TOP_EN is enabled, FBC_EN is enabled, DMA_EN is disabled, these bits indicate the output address of compressed data in FBC mode.