Module d1_pac::csic::csic_dma::csic_dma_f1_bufa_result

CSIC DMA FIFO 1 Output Buffer-A Address Result Register

Structs

• CSIC_DMA_F1_BUFA_RESULT_SPEC
  CSIC DMA FIFO 1 Output Buffer-A Address Result Register
• R
  Register csic_dma_f1_bufa_result reader
• W
  Register csic_dma_f1_bufa_result writer

Type Aliases

• F1_BUFA_RESULT_R
  Field f1_bufa_result reader - Indicate the final F1_BUFA address used for DMA or FBC after software configuration or hardware calculation from Buffer-A address register or buffer address fifo. Only used for debug.