Module d1_pac::csic::csic_dma::csic_dma_frm_cnt
source · Expand description
CSIC DMA Frame Counter Register
Structs§
- CSIC DMA Frame Counter Register
- Register
csic_dma_frm_cnt
reader - Register
csic_dma_frm_cnt
writer
Type Aliases§
- Field
frm_cnt_clr
reader - When the bit set to 1, Frame cnt is cleared to 0. - Field
frm_cnt_clr
writer - When the bit set to 1, Frame cnt is cleared to 0. - Field
frm_cnt
reader - Counter value of frame. When frame done comes, the internal counter value add 1, and when the reg full, it is cleared to 0 . When parser sent a sync signal, it is cleared to 0. - Field
pclk_dma_clr_distance
reader - Frame cnt clear cycle - Field
pclk_dma_clr_distance
writer - Frame cnt clear cycle