Module d1_pac::dmac::dmac_irq_pend0
source · Expand description
DMAC IRQ Pending Register 0
Structs§
- DMAC IRQ Pending Register 0
- Register
dmac_irq_pend0
reader - Register
dmac_irq_pend0
writer
Enums§
- The IRQ pending bit for the half package interrupt of DMA
- The IRQ pending bit for the package end interrupt of DMA
- The IRQ pending bit for the queue end interrupt of DMA
Type Aliases§
- Field
dma_hlaf_irq_pend[0-7]
reader - The IRQ pending bit for the half package interrupt of DMA - Field
dma_hlaf_irq_pend[0-7]
writer - The IRQ pending bit for the half package interrupt of DMA - Field
dma_pkg_irq_pend[0-7]
reader - The IRQ pending bit for the package end interrupt of DMA - Field
dma_pkg_irq_pend[0-7]
writer - The IRQ pending bit for the package end interrupt of DMA - Field
dma_queue_irq_pend[0-7]
reader - The IRQ pending bit for the queue end interrupt of DMA - Field
dma_queue_irq_pend[0-7]
writer - The IRQ pending bit for the queue end interrupt of DMA