Type Alias d1_pac::rtc::rtc_spi_clk_ctrl::RTC_SPI_CLK_DIV_W
source · pub type RTC_SPI_CLK_DIV_W<'a, const O: u8> = FieldWriter<'a, u32, RTC_SPI_CLK_CTRL_SPEC, u8, u8, 5, O>;
Expand description
Field rtc_spi_clk_div
writer - RTC Reg CFG SPI Clock Divider: M
Actual SPI Clock = AHBS1/(M+1), (0 to 15) The default frequency of AHBS1 is 200 MHz, and the default frequency of SPI Clock is 20 MHz.
Note: The SPI clock can not exceed 50 MHz, or else the RTC register may be abnormal.
Aliased Type§
struct RTC_SPI_CLK_DIV_W<'a, const O: u8> { /* private fields */ }