Module d1_pac::smhc::emmc_ddr_sbit_det
source · Expand description
eMMC4.5 DDR Start Bit Detection Control Register
Structs§
- eMMC4.5 DDR Start Bit Detection Control Register
- Register
emmc_ddr_sbit_det
reader - Register
emmc_ddr_sbit_det
writer
Enums§
- Control for start bit detection mechanism inside mstorage based on duration of start bit
- HS400 Mode Enable
Type Aliases§
- Field
half_start_bit
reader - Control for start bit detection mechanism inside mstorage based on duration of start bit - Field
half_start_bit
writer - Control for start bit detection mechanism inside mstorage based on duration of start bit - Field
hs400_md_en
reader - HS400 Mode Enable - Field
hs400_md_en
writer - HS400 Mode Enable