Module d1_pac::twi::twi_cntr

TWI Control Register

Structs

• R
  Register twi_cntr reader
• TWI_CNTR_SPEC
  TWI Control Register
• W
  Register twi_cntr writer

Enums

• BUS_EN_A
  TWI Bus Enable
• CLK_COUNT_MODE_A
  Value on reset: 0
• INT_EN_A
  Interrupt Enable

Type Aliases

• A_ACK_R
  Field a_ack reader - Assert Acknowledge
• A_ACK_W
  Field a_ack writer - Assert Acknowledge
• BUS_EN_R
  Field bus_en reader - TWI Bus Enable
• BUS_EN_W
  Field bus_en writer - TWI Bus Enable
• CLK_COUNT_MODE_R
  Field clk_count_mode reader -
• CLK_COUNT_MODE_W
  Field clk_count_mode writer -
• INT_EN_R
  Field int_en reader - Interrupt Enable
• INT_EN_W
  Field int_en writer - Interrupt Enable
• INT_FLAG_R
  Field int_flag reader - Interrupt Flag
• INT_FLAG_W
  Field int_flag writer - Interrupt Flag
• M_STA_R
  Field m_sta reader - Master Mode Start
• M_STA_W
  Field m_sta writer - Master Mode Start
• M_STP_R
  Field m_stp reader - Master Mode Stop
• M_STP_W
  Field m_stp writer - Master Mode Stop