Type Alias d1_pac::usb1::ehci_operational::portsc::FORCE_PORT_RESUME_W

pub type FORCE_PORT_RESUME_W<'a, const O: u8> = BitWriter<'a, u32, PORTSC_SPEC, bool, O>;

Field force_port_resume writer - Force Port Resume

1 = Resume detected/driven on port. 0 = No resume (K-state) detected/driven on port. Default value = 0.

This functionality defined for manipulating this bit depends on the value of the Suspend bit. For example, if the port is not suspend and software transitions this bit to a one, then the effects on the bus are undefined.

Software sets this bit to 1 to drive resume signaling. The Host Controller sets this bit to a 1 if a J-to-K transition is detected while the port is in the Suspend state. When this bit transitions to a one because a J-to-K transition is detected, the Port Change Detect bit in the USBSTS register is also set to a one. If software sets this bit to a one, the host controller must not set the Port Change Detect bit.

Note that when the EHCI controller owns the port, the resume sequence follows the defined sequence documented in the USB Specification Revision 2.0. The resume signaling (Full-speed ‘K’) is driven on the port as long as this remains a one. Software must appropriately time the Resume and set this bit to a zero when the appropriate amount of time has elapsed. Writing a zero (from one) causes the port to return high-speed mode (forcing the bus below the port into a high-speed idle). This bit will remain a one until the port has switched to high-speed idle. The host controller must complete this transition within 2 milliseconds of software setting this bit to a zero.

This field is zero if Port Power is zero.

Aliased Type

struct FORCE_PORT_RESUME_W<'a, const O: u8> { /* private fields */ }