1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258

#[doc = "Register `pb_eint_ctl` reader"]
pub struct R(crate::R<PB_EINT_CTL_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<PB_EINT_CTL_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl From<crate::R<PB_EINT_CTL_SPEC>> for R {
    #[inline(always)]
    fn from(reader: crate::R<PB_EINT_CTL_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Register `pb_eint_ctl` writer"]
pub struct W(crate::W<PB_EINT_CTL_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<PB_EINT_CTL_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl From<crate::W<PB_EINT_CTL_SPEC>> for W {
    #[inline(always)]
    fn from(writer: crate::W<PB_EINT_CTL_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Field `eint_ctl[0-11]` reader - External INT Enable"]
pub type EINT_CTL_R = crate::BitReader<EINT_CTL_A>;
#[doc = "External INT Enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum EINT_CTL_A {
    #[doc = "0: `0`"]
    DISABLE = 0,
    #[doc = "1: `1`"]
    ENABLE = 1,
}
impl From<EINT_CTL_A> for bool {
    #[inline(always)]
    fn from(variant: EINT_CTL_A) -> Self {
        variant as u8 != 0
    }
}
impl EINT_CTL_R {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub fn variant(&self) -> EINT_CTL_A {
        match self.bits {
            false => EINT_CTL_A::DISABLE,
            true => EINT_CTL_A::ENABLE,
        }
    }
    #[doc = "Checks if the value of the field is `DISABLE`"]
    #[inline(always)]
    pub fn is_disable(&self) -> bool {
        *self == EINT_CTL_A::DISABLE
    }
    #[doc = "Checks if the value of the field is `ENABLE`"]
    #[inline(always)]
    pub fn is_enable(&self) -> bool {
        *self == EINT_CTL_A::ENABLE
    }
}
#[doc = "Field `eint_ctl[0-11]` writer - External INT Enable"]
pub type EINT_CTL_W<'a, const O: u8> = crate::BitWriter<'a, u32, PB_EINT_CTL_SPEC, EINT_CTL_A, O>;
impl<'a, const O: u8> EINT_CTL_W<'a, O> {
    #[doc = "`0`"]
    #[inline(always)]
    pub fn disable(self) -> &'a mut W {
        self.variant(EINT_CTL_A::DISABLE)
    }
    #[doc = "`1`"]
    #[inline(always)]
    pub fn enable(self) -> &'a mut W {
        self.variant(EINT_CTL_A::ENABLE)
    }
}
impl R {
    #[doc = "External INT Enable"]
    #[inline(always)]
    pub unsafe fn eint_ctl(&self, n: u8) -> EINT_CTL_R {
        EINT_CTL_R::new(((self.bits >> n) & 1) != 0)
    }
    #[doc = "Bit 0 - External INT Enable"]
    #[inline(always)]
    pub fn eint0_ctl(&self) -> EINT_CTL_R {
        EINT_CTL_R::new((self.bits & 1) != 0)
    }
    #[doc = "Bit 1 - External INT Enable"]
    #[inline(always)]
    pub fn eint1_ctl(&self) -> EINT_CTL_R {
        EINT_CTL_R::new(((self.bits >> 1) & 1) != 0)
    }
    #[doc = "Bit 2 - External INT Enable"]
    #[inline(always)]
    pub fn eint2_ctl(&self) -> EINT_CTL_R {
        EINT_CTL_R::new(((self.bits >> 2) & 1) != 0)
    }
    #[doc = "Bit 3 - External INT Enable"]
    #[inline(always)]
    pub fn eint3_ctl(&self) -> EINT_CTL_R {
        EINT_CTL_R::new(((self.bits >> 3) & 1) != 0)
    }
    #[doc = "Bit 4 - External INT Enable"]
    #[inline(always)]
    pub fn eint4_ctl(&self) -> EINT_CTL_R {
        EINT_CTL_R::new(((self.bits >> 4) & 1) != 0)
    }
    #[doc = "Bit 5 - External INT Enable"]
    #[inline(always)]
    pub fn eint5_ctl(&self) -> EINT_CTL_R {
        EINT_CTL_R::new(((self.bits >> 5) & 1) != 0)
    }
    #[doc = "Bit 6 - External INT Enable"]
    #[inline(always)]
    pub fn eint6_ctl(&self) -> EINT_CTL_R {
        EINT_CTL_R::new(((self.bits >> 6) & 1) != 0)
    }
    #[doc = "Bit 7 - External INT Enable"]
    #[inline(always)]
    pub fn eint7_ctl(&self) -> EINT_CTL_R {
        EINT_CTL_R::new(((self.bits >> 7) & 1) != 0)
    }
    #[doc = "Bit 8 - External INT Enable"]
    #[inline(always)]
    pub fn eint8_ctl(&self) -> EINT_CTL_R {
        EINT_CTL_R::new(((self.bits >> 8) & 1) != 0)
    }
    #[doc = "Bit 9 - External INT Enable"]
    #[inline(always)]
    pub fn eint9_ctl(&self) -> EINT_CTL_R {
        EINT_CTL_R::new(((self.bits >> 9) & 1) != 0)
    }
    #[doc = "Bit 10 - External INT Enable"]
    #[inline(always)]
    pub fn eint10_ctl(&self) -> EINT_CTL_R {
        EINT_CTL_R::new(((self.bits >> 10) & 1) != 0)
    }
    #[doc = "Bit 11 - External INT Enable"]
    #[inline(always)]
    pub fn eint11_ctl(&self) -> EINT_CTL_R {
        EINT_CTL_R::new(((self.bits >> 11) & 1) != 0)
    }
}
impl W {
    #[doc = "External INT Enable"]
    #[inline(always)]
    #[must_use]
    pub unsafe fn eint_ctl<const O: u8>(&mut self) -> EINT_CTL_W<O> {
        EINT_CTL_W::new(self)
    }
    #[doc = "Bit 0 - External INT Enable"]
    #[inline(always)]
    #[must_use]
    pub fn eint0_ctl(&mut self) -> EINT_CTL_W<0> {
        EINT_CTL_W::new(self)
    }
    #[doc = "Bit 1 - External INT Enable"]
    #[inline(always)]
    #[must_use]
    pub fn eint1_ctl(&mut self) -> EINT_CTL_W<1> {
        EINT_CTL_W::new(self)
    }
    #[doc = "Bit 2 - External INT Enable"]
    #[inline(always)]
    #[must_use]
    pub fn eint2_ctl(&mut self) -> EINT_CTL_W<2> {
        EINT_CTL_W::new(self)
    }
    #[doc = "Bit 3 - External INT Enable"]
    #[inline(always)]
    #[must_use]
    pub fn eint3_ctl(&mut self) -> EINT_CTL_W<3> {
        EINT_CTL_W::new(self)
    }
    #[doc = "Bit 4 - External INT Enable"]
    #[inline(always)]
    #[must_use]
    pub fn eint4_ctl(&mut self) -> EINT_CTL_W<4> {
        EINT_CTL_W::new(self)
    }
    #[doc = "Bit 5 - External INT Enable"]
    #[inline(always)]
    #[must_use]
    pub fn eint5_ctl(&mut self) -> EINT_CTL_W<5> {
        EINT_CTL_W::new(self)
    }
    #[doc = "Bit 6 - External INT Enable"]
    #[inline(always)]
    #[must_use]
    pub fn eint6_ctl(&mut self) -> EINT_CTL_W<6> {
        EINT_CTL_W::new(self)
    }
    #[doc = "Bit 7 - External INT Enable"]
    #[inline(always)]
    #[must_use]
    pub fn eint7_ctl(&mut self) -> EINT_CTL_W<7> {
        EINT_CTL_W::new(self)
    }
    #[doc = "Bit 8 - External INT Enable"]
    #[inline(always)]
    #[must_use]
    pub fn eint8_ctl(&mut self) -> EINT_CTL_W<8> {
        EINT_CTL_W::new(self)
    }
    #[doc = "Bit 9 - External INT Enable"]
    #[inline(always)]
    #[must_use]
    pub fn eint9_ctl(&mut self) -> EINT_CTL_W<9> {
        EINT_CTL_W::new(self)
    }
    #[doc = "Bit 10 - External INT Enable"]
    #[inline(always)]
    #[must_use]
    pub fn eint10_ctl(&mut self) -> EINT_CTL_W<10> {
        EINT_CTL_W::new(self)
    }
    #[doc = "Bit 11 - External INT Enable"]
    #[inline(always)]
    #[must_use]
    pub fn eint11_ctl(&mut self) -> EINT_CTL_W<11> {
        EINT_CTL_W::new(self)
    }
    #[doc = "Writes raw bits to the register."]
    #[inline(always)]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "PB External Interrupt Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pb_eint_ctl](index.html) module"]
pub struct PB_EINT_CTL_SPEC;
impl crate::RegisterSpec for PB_EINT_CTL_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [pb_eint_ctl::R](R) reader structure"]
impl crate::Readable for PB_EINT_CTL_SPEC {
    type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [pb_eint_ctl::W](W) writer structure"]
impl crate::Writable for PB_EINT_CTL_SPEC {
    type Writer = W;
    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
}
#[doc = "`reset()` method sets pb_eint_ctl to value 0"]
impl crate::Resettable for PB_EINT_CTL_SPEC {
    const RESET_VALUE: Self::Ux = 0;
}