1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
#[doc = "Register `spi_batc` reader"]
pub struct R(crate::R<SPI_BATC_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<SPI_BATC_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl From<crate::R<SPI_BATC_SPEC>> for R {
    #[inline(always)]
    fn from(reader: crate::R<SPI_BATC_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Register `spi_batc` writer"]
pub struct W(crate::W<SPI_BATC_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<SPI_BATC_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl From<crate::W<SPI_BATC_SPEC>> for W {
    #[inline(always)]
    fn from(writer: crate::W<SPI_BATC_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Field `wms` reader - Work Mode Select"]
pub type WMS_R = crate::FieldReader<u8, WMS_A>;
#[doc = "Work Mode Select\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
#[repr(u8)]
pub enum WMS_A {
    #[doc = "0: `0`"]
    BYTE_ALIGNED = 0,
    #[doc = "2: `10`"]
    BIT_ALIGNED_3WIRE = 2,
    #[doc = "3: `11`"]
    BIT_ALIGNED_STANDARD = 3,
}
impl From<WMS_A> for u8 {
    #[inline(always)]
    fn from(variant: WMS_A) -> Self {
        variant as _
    }
}
impl WMS_R {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub fn variant(&self) -> WMS_A {
        match self.bits {
            0 => WMS_A::BYTE_ALIGNED,
            2 => WMS_A::BIT_ALIGNED_3WIRE,
            3 => WMS_A::BIT_ALIGNED_STANDARD,
            _ => unreachable!(),
        }
    }
    #[doc = "Checks if the value of the field is `BYTE_ALIGNED`"]
    #[inline(always)]
    pub fn is_byte_aligned(&self) -> bool {
        *self == WMS_A::BYTE_ALIGNED
    }
    #[doc = "Checks if the value of the field is `BIT_ALIGNED_3WIRE`"]
    #[inline(always)]
    pub fn is_bit_aligned_3wire(&self) -> bool {
        *self == WMS_A::BIT_ALIGNED_3WIRE
    }
    #[doc = "Checks if the value of the field is `BIT_ALIGNED_STANDARD`"]
    #[inline(always)]
    pub fn is_bit_aligned_standard(&self) -> bool {
        *self == WMS_A::BIT_ALIGNED_STANDARD
    }
}
#[doc = "Field `wms` writer - Work Mode Select"]
pub type WMS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SPI_BATC_SPEC, u8, WMS_A, 2, O>;
impl<'a, const O: u8> WMS_W<'a, O> {
    #[doc = "`0`"]
    #[inline(always)]
    pub fn byte_aligned(self) -> &'a mut W {
        self.variant(WMS_A::BYTE_ALIGNED)
    }
    #[doc = "`10`"]
    #[inline(always)]
    pub fn bit_aligned_3wire(self) -> &'a mut W {
        self.variant(WMS_A::BIT_ALIGNED_3WIRE)
    }
    #[doc = "`11`"]
    #[inline(always)]
    pub fn bit_aligned_standard(self) -> &'a mut W {
        self.variant(WMS_A::BIT_ALIGNED_STANDARD)
    }
}
#[doc = "Field `ss_sel` reader - SPI Chip Select"]
pub type SS_SEL_R = crate::FieldReader<u8, SS_SEL_A>;
#[doc = "SPI Chip Select\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
#[repr(u8)]
pub enum SS_SEL_A {
    #[doc = "0: `0`"]
    SS0 = 0,
    #[doc = "1: `1`"]
    SS1 = 1,
    #[doc = "2: `10`"]
    SS2 = 2,
    #[doc = "3: `11`"]
    SS3 = 3,
}
impl From<SS_SEL_A> for u8 {
    #[inline(always)]
    fn from(variant: SS_SEL_A) -> Self {
        variant as _
    }
}
impl SS_SEL_R {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub fn variant(&self) -> SS_SEL_A {
        match self.bits {
            0 => SS_SEL_A::SS0,
            1 => SS_SEL_A::SS1,
            2 => SS_SEL_A::SS2,
            3 => SS_SEL_A::SS3,
            _ => unreachable!(),
        }
    }
    #[doc = "Checks if the value of the field is `SS0`"]
    #[inline(always)]
    pub fn is_ss0(&self) -> bool {
        *self == SS_SEL_A::SS0
    }
    #[doc = "Checks if the value of the field is `SS1`"]
    #[inline(always)]
    pub fn is_ss1(&self) -> bool {
        *self == SS_SEL_A::SS1
    }
    #[doc = "Checks if the value of the field is `SS2`"]
    #[inline(always)]
    pub fn is_ss2(&self) -> bool {
        *self == SS_SEL_A::SS2
    }
    #[doc = "Checks if the value of the field is `SS3`"]
    #[inline(always)]
    pub fn is_ss3(&self) -> bool {
        *self == SS_SEL_A::SS3
    }
}
#[doc = "Field `ss_sel` writer - SPI Chip Select"]
pub type SS_SEL_W<'a, const O: u8> =
    crate::FieldWriterSafe<'a, u32, SPI_BATC_SPEC, u8, SS_SEL_A, 2, O>;
impl<'a, const O: u8> SS_SEL_W<'a, O> {
    #[doc = "`0`"]
    #[inline(always)]
    pub fn ss0(self) -> &'a mut W {
        self.variant(SS_SEL_A::SS0)
    }
    #[doc = "`1`"]
    #[inline(always)]
    pub fn ss1(self) -> &'a mut W {
        self.variant(SS_SEL_A::SS1)
    }
    #[doc = "`10`"]
    #[inline(always)]
    pub fn ss2(self) -> &'a mut W {
        self.variant(SS_SEL_A::SS2)
    }
    #[doc = "`11`"]
    #[inline(always)]
    pub fn ss3(self) -> &'a mut W {
        self.variant(SS_SEL_A::SS3)
    }
}
#[doc = "Field `spol` reader - SPI Chip Select Signal Polarity Control"]
pub type SPOL_R = crate::BitReader<SPOL_A>;
#[doc = "SPI Chip Select Signal Polarity Control\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum SPOL_A {
    #[doc = "0: `0`"]
    HIGH = 0,
    #[doc = "1: `1`"]
    LOW = 1,
}
impl From<SPOL_A> for bool {
    #[inline(always)]
    fn from(variant: SPOL_A) -> Self {
        variant as u8 != 0
    }
}
impl SPOL_R {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub fn variant(&self) -> SPOL_A {
        match self.bits {
            false => SPOL_A::HIGH,
            true => SPOL_A::LOW,
        }
    }
    #[doc = "Checks if the value of the field is `HIGH`"]
    #[inline(always)]
    pub fn is_high(&self) -> bool {
        *self == SPOL_A::HIGH
    }
    #[doc = "Checks if the value of the field is `LOW`"]
    #[inline(always)]
    pub fn is_low(&self) -> bool {
        *self == SPOL_A::LOW
    }
}
#[doc = "Field `spol` writer - SPI Chip Select Signal Polarity Control"]
pub type SPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_BATC_SPEC, SPOL_A, O>;
impl<'a, const O: u8> SPOL_W<'a, O> {
    #[doc = "`0`"]
    #[inline(always)]
    pub fn high(self) -> &'a mut W {
        self.variant(SPOL_A::HIGH)
    }
    #[doc = "`1`"]
    #[inline(always)]
    pub fn low(self) -> &'a mut W {
        self.variant(SPOL_A::LOW)
    }
}
#[doc = "Field `ss_owner` reader - SS Output Owner Select"]
pub type SS_OWNER_R = crate::BitReader<SS_OWNER_A>;
#[doc = "SS Output Owner Select\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum SS_OWNER_A {
    #[doc = "0: `0`"]
    SPI_CONTROLLER = 0,
    #[doc = "1: `1`"]
    SOFTWARE = 1,
}
impl From<SS_OWNER_A> for bool {
    #[inline(always)]
    fn from(variant: SS_OWNER_A) -> Self {
        variant as u8 != 0
    }
}
impl SS_OWNER_R {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub fn variant(&self) -> SS_OWNER_A {
        match self.bits {
            false => SS_OWNER_A::SPI_CONTROLLER,
            true => SS_OWNER_A::SOFTWARE,
        }
    }
    #[doc = "Checks if the value of the field is `SPI_CONTROLLER`"]
    #[inline(always)]
    pub fn is_spi_controller(&self) -> bool {
        *self == SS_OWNER_A::SPI_CONTROLLER
    }
    #[doc = "Checks if the value of the field is `SOFTWARE`"]
    #[inline(always)]
    pub fn is_software(&self) -> bool {
        *self == SS_OWNER_A::SOFTWARE
    }
}
#[doc = "Field `ss_owner` writer - SS Output Owner Select"]
pub type SS_OWNER_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_BATC_SPEC, SS_OWNER_A, O>;
impl<'a, const O: u8> SS_OWNER_W<'a, O> {
    #[doc = "`0`"]
    #[inline(always)]
    pub fn spi_controller(self) -> &'a mut W {
        self.variant(SS_OWNER_A::SPI_CONTROLLER)
    }
    #[doc = "`1`"]
    #[inline(always)]
    pub fn software(self) -> &'a mut W {
        self.variant(SS_OWNER_A::SOFTWARE)
    }
}
#[doc = "Field `ss_level` reader - "]
pub type SS_LEVEL_R = crate::BitReader<SS_LEVEL_A>;
#[doc = "\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum SS_LEVEL_A {
    #[doc = "0: `0`"]
    LOW = 0,
    #[doc = "1: `1`"]
    HIGH = 1,
}
impl From<SS_LEVEL_A> for bool {
    #[inline(always)]
    fn from(variant: SS_LEVEL_A) -> Self {
        variant as u8 != 0
    }
}
impl SS_LEVEL_R {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub fn variant(&self) -> SS_LEVEL_A {
        match self.bits {
            false => SS_LEVEL_A::LOW,
            true => SS_LEVEL_A::HIGH,
        }
    }
    #[doc = "Checks if the value of the field is `LOW`"]
    #[inline(always)]
    pub fn is_low(&self) -> bool {
        *self == SS_LEVEL_A::LOW
    }
    #[doc = "Checks if the value of the field is `HIGH`"]
    #[inline(always)]
    pub fn is_high(&self) -> bool {
        *self == SS_LEVEL_A::HIGH
    }
}
#[doc = "Field `ss_level` writer - "]
pub type SS_LEVEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_BATC_SPEC, SS_LEVEL_A, O>;
impl<'a, const O: u8> SS_LEVEL_W<'a, O> {
    #[doc = "`0`"]
    #[inline(always)]
    pub fn low(self) -> &'a mut W {
        self.variant(SS_LEVEL_A::LOW)
    }
    #[doc = "`1`"]
    #[inline(always)]
    pub fn high(self) -> &'a mut W {
        self.variant(SS_LEVEL_A::HIGH)
    }
}
#[doc = "Field `tx_frm_len` reader - Configure the length of serial data frame of TX"]
pub type TX_FRM_LEN_R = crate::FieldReader<u8, u8>;
#[doc = "Field `tx_frm_len` writer - Configure the length of serial data frame of TX"]
pub type TX_FRM_LEN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SPI_BATC_SPEC, u8, u8, 6, O>;
#[doc = "Field `rx_frm_len` reader - Configure the length of serial data frame of RX"]
pub type RX_FRM_LEN_R = crate::FieldReader<u8, u8>;
#[doc = "Field `rx_frm_len` writer - Configure the length of serial data frame of RX"]
pub type RX_FRM_LEN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SPI_BATC_SPEC, u8, u8, 6, O>;
#[doc = "Field `tbc_int_en` reader - Transfer Bits Completed Interrupt Enable"]
pub type TBC_INT_EN_R = crate::BitReader<TBC_INT_EN_A>;
#[doc = "Transfer Bits Completed Interrupt Enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum TBC_INT_EN_A {
    #[doc = "0: `0`"]
    DISABLE = 0,
    #[doc = "1: `1`"]
    ENABLE = 1,
}
impl From<TBC_INT_EN_A> for bool {
    #[inline(always)]
    fn from(variant: TBC_INT_EN_A) -> Self {
        variant as u8 != 0
    }
}
impl TBC_INT_EN_R {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub fn variant(&self) -> TBC_INT_EN_A {
        match self.bits {
            false => TBC_INT_EN_A::DISABLE,
            true => TBC_INT_EN_A::ENABLE,
        }
    }
    #[doc = "Checks if the value of the field is `DISABLE`"]
    #[inline(always)]
    pub fn is_disable(&self) -> bool {
        *self == TBC_INT_EN_A::DISABLE
    }
    #[doc = "Checks if the value of the field is `ENABLE`"]
    #[inline(always)]
    pub fn is_enable(&self) -> bool {
        *self == TBC_INT_EN_A::ENABLE
    }
}
#[doc = "Field `tbc_int_en` writer - Transfer Bits Completed Interrupt Enable"]
pub type TBC_INT_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_BATC_SPEC, TBC_INT_EN_A, O>;
impl<'a, const O: u8> TBC_INT_EN_W<'a, O> {
    #[doc = "`0`"]
    #[inline(always)]
    pub fn disable(self) -> &'a mut W {
        self.variant(TBC_INT_EN_A::DISABLE)
    }
    #[doc = "`1`"]
    #[inline(always)]
    pub fn enable(self) -> &'a mut W {
        self.variant(TBC_INT_EN_A::ENABLE)
    }
}
#[doc = "Field `tbc` reader - Transfer Bits Completed"]
pub type TBC_R = crate::BitReader<TBC_A>;
#[doc = "Transfer Bits Completed\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum TBC_A {
    #[doc = "0: `0`"]
    BUSY = 0,
    #[doc = "1: `1`"]
    COMPLETED = 1,
}
impl From<TBC_A> for bool {
    #[inline(always)]
    fn from(variant: TBC_A) -> Self {
        variant as u8 != 0
    }
}
impl TBC_R {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub fn variant(&self) -> TBC_A {
        match self.bits {
            false => TBC_A::BUSY,
            true => TBC_A::COMPLETED,
        }
    }
    #[doc = "Checks if the value of the field is `BUSY`"]
    #[inline(always)]
    pub fn is_busy(&self) -> bool {
        *self == TBC_A::BUSY
    }
    #[doc = "Checks if the value of the field is `COMPLETED`"]
    #[inline(always)]
    pub fn is_completed(&self) -> bool {
        *self == TBC_A::COMPLETED
    }
}
#[doc = "Field `tbc` writer - Transfer Bits Completed"]
pub type TBC_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_BATC_SPEC, TBC_A, O>;
impl<'a, const O: u8> TBC_W<'a, O> {
    #[doc = "`0`"]
    #[inline(always)]
    pub fn busy(self) -> &'a mut W {
        self.variant(TBC_A::BUSY)
    }
    #[doc = "`1`"]
    #[inline(always)]
    pub fn completed(self) -> &'a mut W {
        self.variant(TBC_A::COMPLETED)
    }
}
#[doc = "Field `msms` reader - Master Sample Standard"]
pub type MSMS_R = crate::BitReader<MSMS_A>;
#[doc = "Master Sample Standard\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum MSMS_A {
    #[doc = "0: `0`"]
    DELAY = 0,
    #[doc = "1: `1`"]
    STANDARD = 1,
}
impl From<MSMS_A> for bool {
    #[inline(always)]
    fn from(variant: MSMS_A) -> Self {
        variant as u8 != 0
    }
}
impl MSMS_R {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub fn variant(&self) -> MSMS_A {
        match self.bits {
            false => MSMS_A::DELAY,
            true => MSMS_A::STANDARD,
        }
    }
    #[doc = "Checks if the value of the field is `DELAY`"]
    #[inline(always)]
    pub fn is_delay(&self) -> bool {
        *self == MSMS_A::DELAY
    }
    #[doc = "Checks if the value of the field is `STANDARD`"]
    #[inline(always)]
    pub fn is_standard(&self) -> bool {
        *self == MSMS_A::STANDARD
    }
}
#[doc = "Field `msms` writer - Master Sample Standard"]
pub type MSMS_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_BATC_SPEC, MSMS_A, O>;
impl<'a, const O: u8> MSMS_W<'a, O> {
    #[doc = "`0`"]
    #[inline(always)]
    pub fn delay(self) -> &'a mut W {
        self.variant(MSMS_A::DELAY)
    }
    #[doc = "`1`"]
    #[inline(always)]
    pub fn standard(self) -> &'a mut W {
        self.variant(MSMS_A::STANDARD)
    }
}
#[doc = "Field `tce` reader - Transfer Control Enable"]
pub type TCE_R = crate::BitReader<TCE_A>;
#[doc = "Transfer Control Enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum TCE_A {
    #[doc = "0: `0`"]
    IDLE = 0,
    #[doc = "1: `1`"]
    INIT = 1,
}
impl From<TCE_A> for bool {
    #[inline(always)]
    fn from(variant: TCE_A) -> Self {
        variant as u8 != 0
    }
}
impl TCE_R {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub fn variant(&self) -> TCE_A {
        match self.bits {
            false => TCE_A::IDLE,
            true => TCE_A::INIT,
        }
    }
    #[doc = "Checks if the value of the field is `IDLE`"]
    #[inline(always)]
    pub fn is_idle(&self) -> bool {
        *self == TCE_A::IDLE
    }
    #[doc = "Checks if the value of the field is `INIT`"]
    #[inline(always)]
    pub fn is_init(&self) -> bool {
        *self == TCE_A::INIT
    }
}
#[doc = "Field `tce` writer - Transfer Control Enable"]
pub type TCE_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_BATC_SPEC, TCE_A, O>;
impl<'a, const O: u8> TCE_W<'a, O> {
    #[doc = "`0`"]
    #[inline(always)]
    pub fn idle(self) -> &'a mut W {
        self.variant(TCE_A::IDLE)
    }
    #[doc = "`1`"]
    #[inline(always)]
    pub fn init(self) -> &'a mut W {
        self.variant(TCE_A::INIT)
    }
}
impl R {
    #[doc = "Bits 0:1 - Work Mode Select"]
    #[inline(always)]
    pub fn wms(&self) -> WMS_R {
        WMS_R::new((self.bits & 3) as u8)
    }
    #[doc = "Bits 2:3 - SPI Chip Select"]
    #[inline(always)]
    pub fn ss_sel(&self) -> SS_SEL_R {
        SS_SEL_R::new(((self.bits >> 2) & 3) as u8)
    }
    #[doc = "Bit 5 - SPI Chip Select Signal Polarity Control"]
    #[inline(always)]
    pub fn spol(&self) -> SPOL_R {
        SPOL_R::new(((self.bits >> 5) & 1) != 0)
    }
    #[doc = "Bit 6 - SS Output Owner Select"]
    #[inline(always)]
    pub fn ss_owner(&self) -> SS_OWNER_R {
        SS_OWNER_R::new(((self.bits >> 6) & 1) != 0)
    }
    #[doc = "Bit 7"]
    #[inline(always)]
    pub fn ss_level(&self) -> SS_LEVEL_R {
        SS_LEVEL_R::new(((self.bits >> 7) & 1) != 0)
    }
    #[doc = "Bits 8:13 - Configure the length of serial data frame of TX"]
    #[inline(always)]
    pub fn tx_frm_len(&self) -> TX_FRM_LEN_R {
        TX_FRM_LEN_R::new(((self.bits >> 8) & 0x3f) as u8)
    }
    #[doc = "Bits 16:21 - Configure the length of serial data frame of RX"]
    #[inline(always)]
    pub fn rx_frm_len(&self) -> RX_FRM_LEN_R {
        RX_FRM_LEN_R::new(((self.bits >> 16) & 0x3f) as u8)
    }
    #[doc = "Bit 24 - Transfer Bits Completed Interrupt Enable"]
    #[inline(always)]
    pub fn tbc_int_en(&self) -> TBC_INT_EN_R {
        TBC_INT_EN_R::new(((self.bits >> 24) & 1) != 0)
    }
    #[doc = "Bit 25 - Transfer Bits Completed"]
    #[inline(always)]
    pub fn tbc(&self) -> TBC_R {
        TBC_R::new(((self.bits >> 25) & 1) != 0)
    }
    #[doc = "Bit 30 - Master Sample Standard"]
    #[inline(always)]
    pub fn msms(&self) -> MSMS_R {
        MSMS_R::new(((self.bits >> 30) & 1) != 0)
    }
    #[doc = "Bit 31 - Transfer Control Enable"]
    #[inline(always)]
    pub fn tce(&self) -> TCE_R {
        TCE_R::new(((self.bits >> 31) & 1) != 0)
    }
}
impl W {
    #[doc = "Bits 0:1 - Work Mode Select"]
    #[inline(always)]
    #[must_use]
    pub fn wms(&mut self) -> WMS_W<0> {
        WMS_W::new(self)
    }
    #[doc = "Bits 2:3 - SPI Chip Select"]
    #[inline(always)]
    #[must_use]
    pub fn ss_sel(&mut self) -> SS_SEL_W<2> {
        SS_SEL_W::new(self)
    }
    #[doc = "Bit 5 - SPI Chip Select Signal Polarity Control"]
    #[inline(always)]
    #[must_use]
    pub fn spol(&mut self) -> SPOL_W<5> {
        SPOL_W::new(self)
    }
    #[doc = "Bit 6 - SS Output Owner Select"]
    #[inline(always)]
    #[must_use]
    pub fn ss_owner(&mut self) -> SS_OWNER_W<6> {
        SS_OWNER_W::new(self)
    }
    #[doc = "Bit 7"]
    #[inline(always)]
    #[must_use]
    pub fn ss_level(&mut self) -> SS_LEVEL_W<7> {
        SS_LEVEL_W::new(self)
    }
    #[doc = "Bits 8:13 - Configure the length of serial data frame of TX"]
    #[inline(always)]
    #[must_use]
    pub fn tx_frm_len(&mut self) -> TX_FRM_LEN_W<8> {
        TX_FRM_LEN_W::new(self)
    }
    #[doc = "Bits 16:21 - Configure the length of serial data frame of RX"]
    #[inline(always)]
    #[must_use]
    pub fn rx_frm_len(&mut self) -> RX_FRM_LEN_W<16> {
        RX_FRM_LEN_W::new(self)
    }
    #[doc = "Bit 24 - Transfer Bits Completed Interrupt Enable"]
    #[inline(always)]
    #[must_use]
    pub fn tbc_int_en(&mut self) -> TBC_INT_EN_W<24> {
        TBC_INT_EN_W::new(self)
    }
    #[doc = "Bit 25 - Transfer Bits Completed"]
    #[inline(always)]
    #[must_use]
    pub fn tbc(&mut self) -> TBC_W<25> {
        TBC_W::new(self)
    }
    #[doc = "Bit 30 - Master Sample Standard"]
    #[inline(always)]
    #[must_use]
    pub fn msms(&mut self) -> MSMS_W<30> {
        MSMS_W::new(self)
    }
    #[doc = "Bit 31 - Transfer Control Enable"]
    #[inline(always)]
    #[must_use]
    pub fn tce(&mut self) -> TCE_W<31> {
        TCE_W::new(self)
    }
    #[doc = "Writes raw bits to the register."]
    #[inline(always)]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "SPI Bit-Aligned Transfer Configure Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [spi_batc](index.html) module"]
pub struct SPI_BATC_SPEC;
impl crate::RegisterSpec for SPI_BATC_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [spi_batc::R](R) reader structure"]
impl crate::Readable for SPI_BATC_SPEC {
    type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [spi_batc::W](W) writer structure"]
impl crate::Writable for SPI_BATC_SPEC {
    type Writer = W;
    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
}
#[doc = "`reset()` method sets spi_batc to value 0"]
impl crate::Resettable for SPI_BATC_SPEC {
    const RESET_VALUE: Self::Ux = 0;
}