Struct d1_pac::audio_codec::ac_adc_fifoc::R
source · pub struct R(/* private fields */);
Expand description
Register ac_adc_fifoc
reader
Implementations§
source§impl R
impl R
sourcepub fn adc_fifo_flush(&self) -> ADC_FIFO_FLUSH_R
pub fn adc_fifo_flush(&self) -> ADC_FIFO_FLUSH_R
Bit 0 - ADC FIFO Flush
Write ‘1’ to flush TX FIFO, self clear to ‘0’.
sourcepub fn adc_overrun_irq_en(&self) -> ADC_OVERRUN_IRQ_EN_R
pub fn adc_overrun_irq_en(&self) -> ADC_OVERRUN_IRQ_EN_R
Bit 1 - ADC FIFO Overrun IRQ Enable
sourcepub fn adc_irq_en(&self) -> ADC_IRQ_EN_R
pub fn adc_irq_en(&self) -> ADC_IRQ_EN_R
Bit 2 - ADC FIFO Data Available IRQ Enable
sourcepub fn adc_drq_en(&self) -> ADC_DRQ_EN_R
pub fn adc_drq_en(&self) -> ADC_DRQ_EN_R
Bit 3 - ADC FIFO Data Available DRQ Enable
sourcepub fn rx_fifo_trg_level(&self) -> RX_FIFO_TRG_LEVEL_R
pub fn rx_fifo_trg_level(&self) -> RX_FIFO_TRG_LEVEL_R
Bits 4:11 - RX FIFO Trigger Level (RXTL[5:0])
Interrupt and DMA request trigger level for RX FIFO normal condition IRQ/DRQ generated when WLEVEL > RXTL[5:0]
sourcepub fn rx_sample_bits(&self) -> RX_SAMPLE_BITS_R
pub fn rx_sample_bits(&self) -> RX_SAMPLE_BITS_R
Bit 16 - Receiving Audio Sample Resolution
sourcepub fn rx_sync_en(&self) -> RX_SYNC_EN_R
pub fn rx_sync_en(&self) -> RX_SYNC_EN_R
Bit 20 - Audiocodec RX Synchronize Enable
sourcepub fn rx_sync_en_start(&self) -> RX_SYNC_EN_START_R
pub fn rx_sync_en_start(&self) -> RX_SYNC_EN_START_R
Bit 21 - The bit takes effect only when RX_SYNC_EN is set to 1. System Domain: Audio codec/I2S0/I2S1/I2S2/DMIC/OWA RX Synchronize Enable Start.
sourcepub fn rx_fifo_mode(&self) -> RX_FIFO_MODE_R
pub fn rx_fifo_mode(&self) -> RX_FIFO_MODE_R
Bit 24 - RX FIFO Output Mode (Mode 0, 1)
For 20-bit received audio sample:
Mode 0: RXDATA[31:0] = {FIFO_O[19:0], 12’h0}
Mode 1: RXDATA[31:0] = {12{FIFO_O[19]}, FIFO_O[19:0]}
For 16-bit received audio sample:
Mode 0: RXDATA[31:0] = {FIFO_O[19:4], 16’h0}
Mode 1: RXDATA[31:0] = {16{FIFO_O[19]}, FIFO_O[19:4]}