Struct d1_pac::ccu::pll_ddr_ctrl::W
source · pub struct W(/* private fields */);
Expand description
Register pll_ddr_ctrl
writer
Implementations§
source§impl W
impl W
sourcepub fn pll_output_div2(&mut self) -> PLL_OUTPUT_DIV2_W<'_, 0>
pub fn pll_output_div2(&mut self) -> PLL_OUTPUT_DIV2_W<'_, 0>
Bit 0 - PLL Output Div M0
sourcepub fn pll_input_div2(&mut self) -> PLL_INPUT_DIV2_W<'_, 1>
pub fn pll_input_div2(&mut self) -> PLL_INPUT_DIV2_W<'_, 1>
Bit 1 - PLL Input Div M1
sourcepub fn pll_lock_mdsel(&mut self) -> PLL_LOCK_MDSEL_W<'_, 5>
pub fn pll_lock_mdsel(&mut self) -> PLL_LOCK_MDSEL_W<'_, 5>
Bit 5 - PLL Lock Level
sourcepub fn pll_unlock_mdsel(&mut self) -> PLL_UNLOCK_MDSEL_W<'_, 6>
pub fn pll_unlock_mdsel(&mut self) -> PLL_UNLOCK_MDSEL_W<'_, 6>
Bits 6:7 - PLL Unlock Level
sourcepub fn pll_sdm_en(&mut self) -> PLL_SDM_EN_W<'_, 24>
pub fn pll_sdm_en(&mut self) -> PLL_SDM_EN_W<'_, 24>
Bit 24 - PLL SDM Enable
sourcepub fn pll_output_gate(&mut self) -> PLL_OUTPUT_GATE_W<'_, 27>
pub fn pll_output_gate(&mut self) -> PLL_OUTPUT_GATE_W<'_, 27>
Bit 27 - PLL Output Gating Enable
sourcepub fn lock_enable(&mut self) -> LOCK_ENABLE_W<'_, 29>
pub fn lock_enable(&mut self) -> LOCK_ENABLE_W<'_, 29>
Bit 29 - Lock Enable
sourcepub fn pll_ldo_en(&mut self) -> PLL_LDO_EN_W<'_, 30>
pub fn pll_ldo_en(&mut self) -> PLL_LDO_EN_W<'_, 30>
Bit 30 - LDO Enable
Methods from Deref<Target = W<PLL_DDR_CTRL_SPEC>>§
Trait Implementations§
Auto Trait Implementations§
impl Freeze for W
impl RefUnwindSafe for W
impl Send for W
impl Sync for W
impl Unpin for W
impl UnwindSafe for W
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more