Struct d1_pac::cir_tx::cir_dma_ctl::CIR_DMA_CTL_SPEC

pub struct CIR_DMA_CTL_SPEC;

CIR DMA Control Register

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see cir_dma_ctl module

Trait Implementations

impl Readable for CIR_DMA_CTL_SPEC

read() method returns cir_dma_ctl::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for CIR_DMA_CTL_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for CIR_DMA_CTL_SPEC

reset() method sets cir_dma_ctl to value 0xa5

const RESET_VALUE: Self::Ux = {transmute(0x000000a5): <cir_tx::cir_dma_ctl::CIR_DMA_CTL_SPEC as generic::RegisterSpec>::Ux}

Reset value of the register.

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for CIR_DMA_CTL_SPEC

write(|w| ..) method takes cir_dma_ctl::W writer structure

type Writer = W

Writer type argument to write, et al.

const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = {transmute(0x00000000): <cir_tx::cir_dma_ctl::CIR_DMA_CTL_SPEC as generic::RegisterSpec>::Ux}

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0

const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = {transmute(0x00000000): <cir_tx::cir_dma_ctl::CIR_DMA_CTL_SPEC as generic::RegisterSpec>::Ux}

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1