Struct d1_pac::csic::csic_dma::csic_dma_cfg::W

pub struct W(/* private fields */);

Register csic_dma_cfg writer

Implementations

impl W

pub fn min_sdr_wr_size(&mut self) -> MIN_SDR_WR_SIZE_W<'_, 0>

Bits 0:1 - Minimum size of SDRAM block write

pub fn fps_ds(&mut self) -> FPS_DS_W<'_, 6>

Bits 6:9 - Fps down sample

pub fn field_sel(&mut self) -> FIELD_SEL_W<'_, 10>

Bits 10:11 - Field selection

pub fn hflip_en(&mut self) -> HFLIP_EN_W<'_, 12>

Bit 12 - Horizontal flip enable

When enabled, the received data will be arranged in horizontal flip.

pub fn vflip_en(&mut self) -> VFLIP_EN_W<'_, 13>

Bit 13 - Vertical flip enable

When enabled, the received data will be arranged in vertical flip.

pub fn output_fmt(&mut self) -> OUTPUT_FMT_W<'_, 16>

Bits 16:19 - Output data format

When the input format is set to RAW stream

0000: field-raw-8

0001: field-raw-10

0010: field-raw-12

0011: reserved

0100: field-rgb565

0101: field-rgb888

0110: field-prgb888

0111: reserved

1000: frame-raw-8

1001: frame-raw-10

1010: frame-raw-12

1011: reserved

1100: frame-rgb565

1101: frame-rgb888

1110: frame-prgb888

1111: reserved

When the input format is set to YUV422

0000: field planar YCbCr 422

0001: field planar YCbCr 420

0010: frame planar YCbCr 420

0011: frame planar YCbCr 422

0100: field planar YCbCr 422 UV combined (UV sequence)

0101: field planar YCbCr 420 UV combined (UV sequence)

0110: frame planar YCbCr 420 UV combined (UV sequence)

0111: frame planar YCbCr 422 UV combined (UV sequence)

1000: filed planar YCbCr 422 UV combined (VU sequence)

1001: field planar YCbCr 420 UV combined (VU sequence)

1010: frame planar YCbCr 420 UV combined (VU sequence)

1011: frame planar YCbCr 422 UV combined (VU sequence)

1100: reserved

1101: field YCbCr 400

1110: reserved

1111: frame YCbCr 400

When the input format is set to YUV420

0000: reserved

0001: field planar YCbCr 420

0010: frame planar YCbCr 420

0011: reserved

0100: reserved

0101: field planar YCbCr 420 UV combined (UV sequence)

0110: frame planar YCbCr 420 UV combined (UV sequence) 0111~1000: reserved

1001: field planar YCbCr 420 UV combined (VU sequence)

1010: frame planar YCbCr 420 UV combined (VU sequence) 1011~1100: reserved

1101: field YCbCr 400

1110: reserved

1111: frame YCbCr 400

pub fn yuv_10bit_store_configuration( &mut self, ) -> YUV_10BIT_STORE_CONFIGURATION_W<'_, 20>

Bit 20 - 10-bit store configuration

pub fn yuv_10bit_cut_8bit(&mut self) -> YUV_10BIT_CUT_8BIT_W<'_, 21>

Bit 21 - 10-bit input cut to 8-bit

pub fn pad_val(&mut self) -> PAD_VAL_W<'_, 24>

Bits 24:31 - Padding value when OUTPUT_FMT is prgb888

0x00-0xff

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<CSIC_DMA_CFG_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<CSIC_DMA_CFG_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<CSIC_DMA_CFG_SPEC>> for W

fn from(writer: W<CSIC_DMA_CFG_SPEC>) -> Self

Converts to this type from the input type.