Struct d1_pac::csic::csic_top::csic_ptn_ctrl::R

pub struct R(/* private fields */);

Register csic_ptn_ctrl reader

Implementations

impl R

pub fn ptn_gen_dly(&self) -> PTN_GEN_DLY_R

Bits 0:7 - Clocks delayed before pattern generating start.

pub fn ptn_gen_clk_div(&self) -> PTN_GEN_CLK_DIV_R

Bits 8:9 - Packet generator clock divider

pub fn ptn_mode(&self) -> PTN_MODE_R

Bits 16:19 - Pattern mode selection

pub fn ptn_gen_data_width(&self) -> PTN_GEN_DATA_WIDTH_R

Bits 20:21

pub fn ptn_port_sel(&self) -> PTN_PORT_SEL_R

Bits 24:25 - Pattern Generator output port selection

Methods from Deref<Target = R<CSIC_PTN_CTRL_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<CSIC_PTN_CTRL_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<CSIC_PTN_CTRL_SPEC>> for R

fn from(reader: R<CSIC_PTN_CTRL_SPEC>) -> Self

Converts to this type from the input type.