Struct d1_pac::dmac::dmac_desc_addr::DMAC_DESC_ADDR_SPEC

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pub struct DMAC_DESC_ADDR_SPEC;
Expand description

DMAC Channel Start Address Register

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see dmac_desc_addr module

Trait Implementations§

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impl Readable for DMAC_DESC_ADDR_SPEC

read() method returns dmac_desc_addr::R reader structure

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type Reader = R

Result from a call to read and argument to modify.
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impl RegisterSpec for DMAC_DESC_ADDR_SPEC

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type Ux = u32

Raw register type (u8, u16, u32, …).
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impl Resettable for DMAC_DESC_ADDR_SPEC

reset() method sets dmac_desc_addr%s to value 0

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const RESET_VALUE: Self::Ux = {transmute(0x00000000): <dmac::dmac_desc_addr::DMAC_DESC_ADDR_SPEC as generic::RegisterSpec>::Ux}

Reset value of the register.
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fn reset_value() -> Self::Ux

Reset value of the register.
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impl Writable for DMAC_DESC_ADDR_SPEC

write(|w| ..) method takes dmac_desc_addr::W writer structure

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type Writer = W

Writer type argument to write, et al.
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const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = {transmute(0x00000000): <dmac::dmac_desc_addr::DMAC_DESC_ADDR_SPEC as generic::RegisterSpec>::Ux}

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0
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const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = {transmute(0x00000000): <dmac::dmac_desc_addr::DMAC_DESC_ADDR_SPEC as generic::RegisterSpec>::Ux}

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1

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