Struct d1_pac::dmic::RegisterBlock

source ·
#[repr(C)]
pub struct RegisterBlock {
Show 16 fields pub dmic_en: DMIC_EN, pub dmic_sr: DMIC_SR, pub dmic_ctr: DMIC_CTR, pub dmic_data: DMIC_DATA, pub dmic_intc: DMIC_INTC, pub dmic_ints: DMIC_INTS, pub dmic_rxfifo_ctr: DMIC_RXFIFO_CTR, pub dmic_rxfifo_sta: DMIC_RXFIFO_STA, pub dmic_ch_num: DMIC_CH_NUM, pub dmic_ch_map: DMIC_CH_MAP, pub dmic_cnt: DMIC_CNT, pub data0_data1_vol_ctr: DATA0_DATA1_VOL_CTR, pub data2_data3_vol_ctr: DATA2_DATA3_VOL_CTR, pub hpf_en_ctr: HPF_EN_CTR, pub hpf_coef: HPF_COEF, pub hpf_gain: HPF_GAIN, /* private fields */
}
Expand description

Register block

Fields§

§dmic_en: DMIC_EN

0x00 - DMIC Enable Control Register

§dmic_sr: DMIC_SR

0x04 - DMIC Sample Rate Register

§dmic_ctr: DMIC_CTR

0x08 - DMIC Control Register

§dmic_data: DMIC_DATA

0x10 - DMIC Data Register

§dmic_intc: DMIC_INTC

0x14 - DMIC Interrupt Control Register

§dmic_ints: DMIC_INTS

0x18 - DMIC Interrupt Status Register

§dmic_rxfifo_ctr: DMIC_RXFIFO_CTR

0x1c - DMIC RXFIFO Control Register

§dmic_rxfifo_sta: DMIC_RXFIFO_STA

0x20 - DMIC RXFIFO Status Register

§dmic_ch_num: DMIC_CH_NUM

0x24 - DMIC Channel Numbers Register

§dmic_ch_map: DMIC_CH_MAP

0x28 - DMIC Channel Mapping Register

§dmic_cnt: DMIC_CNT

0x2c - DMIC Counter Register

§data0_data1_vol_ctr: DATA0_DATA1_VOL_CTR

0x30 - Data0 and Data1 Volume Control Register

§data2_data3_vol_ctr: DATA2_DATA3_VOL_CTR

0x34 - Data2 And Data3 Volume Control Register

§hpf_en_ctr: HPF_EN_CTR

0x38 - High Pass Filter Enable Control Register

§hpf_coef: HPF_COEF

0x3c - High Pass Filter Coefficient Register

§hpf_gain: HPF_GAIN

0x40 - High Pass Filter Gain Register

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