Struct d1_pac::hs_timer::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub hs_tmr_irq_en: HS_TMR_IRQ_EN,
    pub hs_tmr_irq_stas: HS_TMR_IRQ_STAS,
    pub hs_tmr0_ctrl: HS_TMR_CTRL,
    pub hs_tmr0_intv_lo: HS_TMR_INTV_LO,
    pub hs_tmr0_intv_hi: HS_TMR_INTV_HI,
    pub hs_tmr0_curnt_lo: HS_TMR_CURNT_LO,
    pub hs_tmr0_curnt_hi: HS_TMR_CURNT_HI,
    pub hs_tmr1_ctrl: HS_TMR_CTRL,
    pub hs_tmr1_intv_lo: HS_TMR_INTV_LO,
    pub hs_tmr1_intv_hi: HS_TMR_INTV_HI,
    pub hs_tmr1_curnt_lo: HS_TMR_CURNT_LO,
    pub hs_tmr1_curnt_hi: HS_TMR_CURNT_HI,
    /* private fields */
}

Register block

Fields

hs_tmr_irq_en: HS_TMR_IRQ_EN

0x00 - HS Timer IRQ Enable Register

hs_tmr_irq_stas: HS_TMR_IRQ_STAS

0x04 - HS Timer Status Register

hs_tmr0_ctrl: HS_TMR_CTRL

0x20 - HS Timer Control Register

hs_tmr0_intv_lo: HS_TMR_INTV_LO

0x24 - HS Timer Interval Value Low Register

hs_tmr0_intv_hi: HS_TMR_INTV_HI

0x28 - HS Timer Interval Value High Register

hs_tmr0_curnt_lo: HS_TMR_CURNT_LO

0x2c - HS Timer Current Value Low Register

hs_tmr0_curnt_hi: HS_TMR_CURNT_HI

0x30 - HS Timer Current Value High Register

hs_tmr1_ctrl: HS_TMR_CTRL

0x40 - HS Timer Control Register

hs_tmr1_intv_lo: HS_TMR_INTV_LO

0x44 - HS Timer Interval Value Low Register

hs_tmr1_intv_hi: HS_TMR_INTV_HI

0x48 - HS Timer Interval Value High Register

hs_tmr1_curnt_lo: HS_TMR_CURNT_LO

0x4c - HS Timer Current Value Low Register

hs_tmr1_curnt_hi: HS_TMR_CURNT_HI

0x50 - HS Timer Current Value High Register