Module d1_pac::i2s_pcm::i2s_pcm_chcfg

I2S/PCM Channel Configuration Register

Structs

• I2S_PCM_CHCFG_SPEC
  I2S/PCM Channel Configuration Register
• R
  Register i2s_pcm_chcfg reader
• W
  Register i2s_pcm_chcfg writer

Enums

• TX_SLOT_HIZ_A
  Value on reset: 0
• TX_STATE_A
  Value on reset: 0

Type Aliases

• RX_SLOT_NUM_R
  Field rx_slot_num reader - RX Channel/Slot number between CPU/DMA and RXFIFO
• RX_SLOT_NUM_W
  Field rx_slot_num writer - RX Channel/Slot number between CPU/DMA and RXFIFO
• TX_SLOT_HIZ_R
  Field tx_slot_hiz reader -
• TX_SLOT_HIZ_W
  Field tx_slot_hiz writer -
• TX_SLOT_NUM_R
  Field tx_slot_num reader - TX Channel/Slot number between CPU/DMA and RXFIFO
• TX_SLOT_NUM_W
  Field tx_slot_num writer - TX Channel/Slot number between CPU/DMA and RXFIFO
• TX_STATE_R
  Field tx_state reader -
• TX_STATE_W
  Field tx_state writer -