Struct d1_pac::iommu::iommu_int_enable::R
source · pub struct R(/* private fields */);
Expand description
Register iommu_int_enable
reader
Implementations§
source§impl R
impl R
sourcepub unsafe fn micro_tlb_invalid_en(&self, n: u8) -> MICRO_TLB_INVALID_EN_R
pub unsafe fn micro_tlb_invalid_en(&self, n: u8) -> MICRO_TLB_INVALID_EN_R
Micro TLB[i] permission invalid interrupt enable
sourcepub fn micro_tlb0_invalid_en(&self) -> MICRO_TLB_INVALID_EN_R
pub fn micro_tlb0_invalid_en(&self) -> MICRO_TLB_INVALID_EN_R
Bit 0 - Micro TLB[i] permission invalid interrupt enable
sourcepub fn micro_tlb1_invalid_en(&self) -> MICRO_TLB_INVALID_EN_R
pub fn micro_tlb1_invalid_en(&self) -> MICRO_TLB_INVALID_EN_R
Bit 2 - Micro TLB[i] permission invalid interrupt enable
sourcepub fn micro_tlb2_invalid_en(&self) -> MICRO_TLB_INVALID_EN_R
pub fn micro_tlb2_invalid_en(&self) -> MICRO_TLB_INVALID_EN_R
Bit 4 - Micro TLB[i] permission invalid interrupt enable
sourcepub fn micro_tlb3_invalid_en(&self) -> MICRO_TLB_INVALID_EN_R
pub fn micro_tlb3_invalid_en(&self) -> MICRO_TLB_INVALID_EN_R
Bit 6 - Micro TLB[i] permission invalid interrupt enable
sourcepub fn micro_tlb4_invalid_en(&self) -> MICRO_TLB_INVALID_EN_R
pub fn micro_tlb4_invalid_en(&self) -> MICRO_TLB_INVALID_EN_R
Bit 8 - Micro TLB[i] permission invalid interrupt enable
sourcepub fn micro_tlb5_invalid_en(&self) -> MICRO_TLB_INVALID_EN_R
pub fn micro_tlb5_invalid_en(&self) -> MICRO_TLB_INVALID_EN_R
Bit 10 - Micro TLB[i] permission invalid interrupt enable
sourcepub fn micro_tlb6_invalid_en(&self) -> MICRO_TLB_INVALID_EN_R
pub fn micro_tlb6_invalid_en(&self) -> MICRO_TLB_INVALID_EN_R
Bit 12 - Micro TLB[i] permission invalid interrupt enable
sourcepub unsafe fn l_page_table_invalid_en(&self, n: u8) -> L_PAGE_TABLE_INVALID_EN_R
pub unsafe fn l_page_table_invalid_en(&self, n: u8) -> L_PAGE_TABLE_INVALID_EN_R
Level[i] page table invalid interrupt enable
sourcepub fn l0_page_table_invalid_en(&self) -> L_PAGE_TABLE_INVALID_EN_R
pub fn l0_page_table_invalid_en(&self) -> L_PAGE_TABLE_INVALID_EN_R
Bit 16 - Level[i] page table invalid interrupt enable
sourcepub fn l1_page_table_invalid_en(&self) -> L_PAGE_TABLE_INVALID_EN_R
pub fn l1_page_table_invalid_en(&self) -> L_PAGE_TABLE_INVALID_EN_R
Bit 17 - Level[i] page table invalid interrupt enable
sourcepub fn dbg_pf_dram_iv_l1_pt_en(&self) -> DBG_PF_DRAM_IV_L1_PT_EN_R
pub fn dbg_pf_dram_iv_l1_pt_en(&self) -> DBG_PF_DRAM_IV_L1_PT_EN_R
Bit 18 - Debug or Prefetch DRAM Invalid Level1 Page Table Enable
sourcepub fn dbg_pf_pc_iv_l1_pt_en(&self) -> DBG_PF_PC_IV_L1_PT_EN_R
pub fn dbg_pf_pc_iv_l1_pt_en(&self) -> DBG_PF_PC_IV_L1_PT_EN_R
Bit 19 - Debug or Prefetch PTW Cache Invalid Level1 Page Table Enable
sourcepub fn dbg_pf_l2_iv_pt_en(&self) -> DBG_PF_L2_IV_PT_EN_R
pub fn dbg_pf_l2_iv_pt_en(&self) -> DBG_PF_L2_IV_PT_EN_R
Bit 20 - Debug or Prefetch Invalid Page Table Enable