Struct d1_pac::iommu::iommu_int_enable::W
source · pub struct W(/* private fields */);
Expand description
Register iommu_int_enable
writer
Implementations§
source§impl W
impl W
sourcepub unsafe fn micro_tlb_invalid_en<const O: u8>(
&mut self,
) -> MICRO_TLB_INVALID_EN_W<'_, O>
pub unsafe fn micro_tlb_invalid_en<const O: u8>( &mut self, ) -> MICRO_TLB_INVALID_EN_W<'_, O>
Micro TLB[i] permission invalid interrupt enable
sourcepub fn micro_tlb0_invalid_en(&mut self) -> MICRO_TLB_INVALID_EN_W<'_, 0>
pub fn micro_tlb0_invalid_en(&mut self) -> MICRO_TLB_INVALID_EN_W<'_, 0>
Bit 0 - Micro TLB[i] permission invalid interrupt enable
sourcepub fn micro_tlb1_invalid_en(&mut self) -> MICRO_TLB_INVALID_EN_W<'_, 2>
pub fn micro_tlb1_invalid_en(&mut self) -> MICRO_TLB_INVALID_EN_W<'_, 2>
Bit 2 - Micro TLB[i] permission invalid interrupt enable
sourcepub fn micro_tlb2_invalid_en(&mut self) -> MICRO_TLB_INVALID_EN_W<'_, 4>
pub fn micro_tlb2_invalid_en(&mut self) -> MICRO_TLB_INVALID_EN_W<'_, 4>
Bit 4 - Micro TLB[i] permission invalid interrupt enable
sourcepub fn micro_tlb3_invalid_en(&mut self) -> MICRO_TLB_INVALID_EN_W<'_, 6>
pub fn micro_tlb3_invalid_en(&mut self) -> MICRO_TLB_INVALID_EN_W<'_, 6>
Bit 6 - Micro TLB[i] permission invalid interrupt enable
sourcepub fn micro_tlb4_invalid_en(&mut self) -> MICRO_TLB_INVALID_EN_W<'_, 8>
pub fn micro_tlb4_invalid_en(&mut self) -> MICRO_TLB_INVALID_EN_W<'_, 8>
Bit 8 - Micro TLB[i] permission invalid interrupt enable
sourcepub fn micro_tlb5_invalid_en(&mut self) -> MICRO_TLB_INVALID_EN_W<'_, 10>
pub fn micro_tlb5_invalid_en(&mut self) -> MICRO_TLB_INVALID_EN_W<'_, 10>
Bit 10 - Micro TLB[i] permission invalid interrupt enable
sourcepub fn micro_tlb6_invalid_en(&mut self) -> MICRO_TLB_INVALID_EN_W<'_, 12>
pub fn micro_tlb6_invalid_en(&mut self) -> MICRO_TLB_INVALID_EN_W<'_, 12>
Bit 12 - Micro TLB[i] permission invalid interrupt enable
sourcepub unsafe fn l_page_table_invalid_en<const O: u8>(
&mut self,
) -> L_PAGE_TABLE_INVALID_EN_W<'_, O>
pub unsafe fn l_page_table_invalid_en<const O: u8>( &mut self, ) -> L_PAGE_TABLE_INVALID_EN_W<'_, O>
Level[i] page table invalid interrupt enable
sourcepub fn l0_page_table_invalid_en(&mut self) -> L_PAGE_TABLE_INVALID_EN_W<'_, 16>
pub fn l0_page_table_invalid_en(&mut self) -> L_PAGE_TABLE_INVALID_EN_W<'_, 16>
Bit 16 - Level[i] page table invalid interrupt enable
sourcepub fn l1_page_table_invalid_en(&mut self) -> L_PAGE_TABLE_INVALID_EN_W<'_, 17>
pub fn l1_page_table_invalid_en(&mut self) -> L_PAGE_TABLE_INVALID_EN_W<'_, 17>
Bit 17 - Level[i] page table invalid interrupt enable
sourcepub fn dbg_pf_dram_iv_l1_pt_en(&mut self) -> DBG_PF_DRAM_IV_L1_PT_EN_W<'_, 18>
pub fn dbg_pf_dram_iv_l1_pt_en(&mut self) -> DBG_PF_DRAM_IV_L1_PT_EN_W<'_, 18>
Bit 18 - Debug or Prefetch DRAM Invalid Level1 Page Table Enable
sourcepub fn dbg_pf_pc_iv_l1_pt_en(&mut self) -> DBG_PF_PC_IV_L1_PT_EN_W<'_, 19>
pub fn dbg_pf_pc_iv_l1_pt_en(&mut self) -> DBG_PF_PC_IV_L1_PT_EN_W<'_, 19>
Bit 19 - Debug or Prefetch PTW Cache Invalid Level1 Page Table Enable
sourcepub fn dbg_pf_l2_iv_pt_en(&mut self) -> DBG_PF_L2_IV_PT_EN_W<'_, 20>
pub fn dbg_pf_l2_iv_pt_en(&mut self) -> DBG_PF_L2_IV_PT_EN_W<'_, 20>
Bit 20 - Debug or Prefetch Invalid Page Table Enable