Struct d1_pac::pwm::cisr::W

pub struct W(/* private fields */);

Register cisr writer

Implementations

impl W

pub unsafe fn cris<const O: u8>(&mut self) -> CRIS_W<'_, O>

Status of the capture channel rising lock interrupt

When the capture channel captures rising edge, if the rise lock interrupt ( CRIE ) is enabled, this bit is set 1 by hardware. Writing 1 to clear this bit.

Reads 0: The capture channel interrupt is not pending.

Reads 1: The capture channel interrupt is pending.

Writes 0: no effect.

Writes 1: Clear the status of the capture channel interrupt.

pub fn cris0(&mut self) -> CRIS_W<'_, 0>

Bit 0 - Status of the capture channel rising lock interrupt

When the capture channel captures rising edge, if the rise lock interrupt ( CRIE ) is enabled, this bit is set 1 by hardware. Writing 1 to clear this bit.

Reads 0: The capture channel interrupt is not pending.

Reads 1: The capture channel interrupt is pending.

Writes 0: no effect.

Writes 1: Clear the status of the capture channel interrupt.

pub fn cris1(&mut self) -> CRIS_W<'_, 2>

Bit 2 - Status of the capture channel rising lock interrupt

When the capture channel captures rising edge, if the rise lock interrupt ( CRIE ) is enabled, this bit is set 1 by hardware. Writing 1 to clear this bit.

Reads 0: The capture channel interrupt is not pending.

Reads 1: The capture channel interrupt is pending.

Writes 0: no effect.

Writes 1: Clear the status of the capture channel interrupt.

pub fn cris2(&mut self) -> CRIS_W<'_, 4>

Bit 4 - Status of the capture channel rising lock interrupt

When the capture channel captures rising edge, if the rise lock interrupt ( CRIE ) is enabled, this bit is set 1 by hardware. Writing 1 to clear this bit.

Reads 0: The capture channel interrupt is not pending.

Reads 1: The capture channel interrupt is pending.

Writes 0: no effect.

Writes 1: Clear the status of the capture channel interrupt.

pub fn cris3(&mut self) -> CRIS_W<'_, 6>

Bit 6 - Status of the capture channel rising lock interrupt

When the capture channel captures rising edge, if the rise lock interrupt ( CRIE ) is enabled, this bit is set 1 by hardware. Writing 1 to clear this bit.

Reads 0: The capture channel interrupt is not pending.

Reads 1: The capture channel interrupt is pending.

Writes 0: no effect.

Writes 1: Clear the status of the capture channel interrupt.

pub fn cris4(&mut self) -> CRIS_W<'_, 8>

Bit 8 - Status of the capture channel rising lock interrupt

When the capture channel captures rising edge, if the rise lock interrupt ( CRIE ) is enabled, this bit is set 1 by hardware. Writing 1 to clear this bit.

Reads 0: The capture channel interrupt is not pending.

Reads 1: The capture channel interrupt is pending.

Writes 0: no effect.

Writes 1: Clear the status of the capture channel interrupt.

pub fn cris5(&mut self) -> CRIS_W<'_, 10>

Bit 10 - Status of the capture channel rising lock interrupt

When the capture channel captures rising edge, if the rise lock interrupt ( CRIE ) is enabled, this bit is set 1 by hardware. Writing 1 to clear this bit.

Reads 0: The capture channel interrupt is not pending.

Reads 1: The capture channel interrupt is pending.

Writes 0: no effect.

Writes 1: Clear the status of the capture channel interrupt.

pub fn cris6(&mut self) -> CRIS_W<'_, 12>

Bit 12 - Status of the capture channel rising lock interrupt

When the capture channel captures rising edge, if the rise lock interrupt ( CRIE ) is enabled, this bit is set 1 by hardware. Writing 1 to clear this bit.

Reads 0: The capture channel interrupt is not pending.

Reads 1: The capture channel interrupt is pending.

Writes 0: no effect.

Writes 1: Clear the status of the capture channel interrupt.

pub fn cris7(&mut self) -> CRIS_W<'_, 14>

Bit 14 - Status of the capture channel rising lock interrupt

When the capture channel captures rising edge, if the rise lock interrupt ( CRIE ) is enabled, this bit is set 1 by hardware. Writing 1 to clear this bit.

Reads 0: The capture channel interrupt is not pending.

Reads 1: The capture channel interrupt is pending.

Writes 0: no effect.

Writes 1: Clear the status of the capture channel interrupt.

pub unsafe fn cfis<const O: u8>(&mut self) -> CFIS_W<'_, O>

Status of the capture channel falling lock interrupt

When the capture channel captures falling edge, if the fall lock interrupt ( CFIE ) is enabled, this bit is set to 1 by hardware. Writing 1 to clear this bit.

Reads 0: The capture channel interrupt is not pending.

Reads 1: The capture channel interrupt is pending.

Writes 0: no effect.

Writes 1: Clear the status of the capture channel interrupt.

pub fn cfis0(&mut self) -> CFIS_W<'_, 1>

Bit 1 - Status of the capture channel falling lock interrupt

When the capture channel captures falling edge, if the fall lock interrupt ( CFIE ) is enabled, this bit is set to 1 by hardware. Writing 1 to clear this bit.

Reads 0: The capture channel interrupt is not pending.

Reads 1: The capture channel interrupt is pending.

Writes 0: no effect.

Writes 1: Clear the status of the capture channel interrupt.

pub fn cfis1(&mut self) -> CFIS_W<'_, 3>

Bit 3 - Status of the capture channel falling lock interrupt

When the capture channel captures falling edge, if the fall lock interrupt ( CFIE ) is enabled, this bit is set to 1 by hardware. Writing 1 to clear this bit.

Reads 0: The capture channel interrupt is not pending.

Reads 1: The capture channel interrupt is pending.

Writes 0: no effect.

Writes 1: Clear the status of the capture channel interrupt.

pub fn cfis2(&mut self) -> CFIS_W<'_, 5>

Bit 5 - Status of the capture channel falling lock interrupt

When the capture channel captures falling edge, if the fall lock interrupt ( CFIE ) is enabled, this bit is set to 1 by hardware. Writing 1 to clear this bit.

Reads 0: The capture channel interrupt is not pending.

Reads 1: The capture channel interrupt is pending.

Writes 0: no effect.

Writes 1: Clear the status of the capture channel interrupt.

pub fn cfis3(&mut self) -> CFIS_W<'_, 7>

Bit 7 - Status of the capture channel falling lock interrupt

When the capture channel captures falling edge, if the fall lock interrupt ( CFIE ) is enabled, this bit is set to 1 by hardware. Writing 1 to clear this bit.

Reads 0: The capture channel interrupt is not pending.

Reads 1: The capture channel interrupt is pending.

Writes 0: no effect.

Writes 1: Clear the status of the capture channel interrupt.

pub fn cfis4(&mut self) -> CFIS_W<'_, 9>

Bit 9 - Status of the capture channel falling lock interrupt

When the capture channel captures falling edge, if the fall lock interrupt ( CFIE ) is enabled, this bit is set to 1 by hardware. Writing 1 to clear this bit.

Reads 0: The capture channel interrupt is not pending.

Reads 1: The capture channel interrupt is pending.

Writes 0: no effect.

Writes 1: Clear the status of the capture channel interrupt.

pub fn cfis5(&mut self) -> CFIS_W<'_, 11>

Bit 11 - Status of the capture channel falling lock interrupt

When the capture channel captures falling edge, if the fall lock interrupt ( CFIE ) is enabled, this bit is set to 1 by hardware. Writing 1 to clear this bit.

Reads 0: The capture channel interrupt is not pending.

Reads 1: The capture channel interrupt is pending.

Writes 0: no effect.

Writes 1: Clear the status of the capture channel interrupt.

pub fn cfis6(&mut self) -> CFIS_W<'_, 13>

Bit 13 - Status of the capture channel falling lock interrupt

When the capture channel captures falling edge, if the fall lock interrupt ( CFIE ) is enabled, this bit is set to 1 by hardware. Writing 1 to clear this bit.

Reads 0: The capture channel interrupt is not pending.

Reads 1: The capture channel interrupt is pending.

Writes 0: no effect.

Writes 1: Clear the status of the capture channel interrupt.

pub fn cfis7(&mut self) -> CFIS_W<'_, 15>

Bit 15 - Status of the capture channel falling lock interrupt

When the capture channel captures falling edge, if the fall lock interrupt ( CFIE ) is enabled, this bit is set to 1 by hardware. Writing 1 to clear this bit.

Reads 0: The capture channel interrupt is not pending.

Reads 1: The capture channel interrupt is pending.

Writes 0: no effect.

Writes 1: Clear the status of the capture channel interrupt.

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<CISR_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<CISR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<CISR_SPEC>> for W

fn from(writer: W<CISR_SPEC>) -> Self

Converts to this type from the input type.