Struct d1_pac::pwm::RegisterBlock

source ·
#[repr(C)]
pub struct RegisterBlock {
Show 72 fields pub pier: PIER, pub pisr: PISR, pub cier: CIER, pub cisr: CISR, pub pccr01: PCCR01, pub pccr23: PCCR23, pub pccr45: PCCR45, pub pccr67: PCCR67, pub pcgr: PCGR, pub pdzcr01: PDZCR01, pub pdzcr23: PDZCR23, pub pdzcr45: PDZCR45, pub pdzcr67: PDZCR67, pub per: PER, pub pgr: [PGR; 4], pub cer: CER, pub pcr0: PCR, pub ppr0: PPR, pub pcntr0: PCNTR, pub ppcntr0: PPCNTR, pub ccr0: CCR, pub crlr0: CRLR, pub cflr0: CFLR, pub pcr1: PCR, pub ppr1: PPR, pub pcntr1: PCNTR, pub ppcntr1: PPCNTR, pub ccr1: CCR, pub crlr1: CRLR, pub cflr1: CFLR, pub pcr2: PCR, pub ppr2: PPR, pub pcntr2: PCNTR, pub ppcntr2: PPCNTR, pub ccr2: CCR, pub crlr2: CRLR, pub cflr2: CFLR, pub pcr3: PCR, pub ppr3: PPR, pub pcntr3: PCNTR, pub ppcntr3: PPCNTR, pub ccr3: CCR, pub crlr3: CRLR, pub cflr3: CFLR, pub pcr4: PCR, pub ppr4: PPR, pub pcntr4: PCNTR, pub ppcntr4: PPCNTR, pub ccr4: CCR, pub crlr4: CRLR, pub cflr4: CFLR, pub pcr5: PCR, pub ppr5: PPR, pub pcntr5: PCNTR, pub ppcntr5: PPCNTR, pub ccr5: CCR, pub crlr5: CRLR, pub cflr5: CFLR, pub pcr6: PCR, pub ppr6: PPR, pub pcntr6: PCNTR, pub ppcntr6: PPCNTR, pub ccr6: CCR, pub crlr6: CRLR, pub cflr6: CFLR, pub pcr7: PCR, pub ppr7: PPR, pub pcntr7: PCNTR, pub ppcntr7: PPCNTR, pub ccr7: CCR, pub crlr7: CRLR, pub cflr7: CFLR, /* private fields */
}
Expand description

Register block

Fields§

§pier: PIER

0x00 - PWM IRQ Enable Register

§pisr: PISR

0x04 - PWM IRQ Status Register

§cier: CIER

0x10 - Capture IRQ Enable Register

§cisr: CISR

0x14 - Capture IRQ Status Register

§pccr01: PCCR01

0x20 - PWM01 Clock Configuration Register

§pccr23: PCCR23

0x24 - PWM23 Clock Configuration Register

§pccr45: PCCR45

0x28 - PWM45 Clock Configuration Register

§pccr67: PCCR67

0x2c - PWM67 Clock Configuration Register

§pcgr: PCGR

0x40 - PWM Clock Gating Register

§pdzcr01: PDZCR01

0x60 - PWM01 Dead Zone Control Register

§pdzcr23: PDZCR23

0x64 - PWM23 Dead Zone Control Register

§pdzcr45: PDZCR45

0x68 - PWM45 Dead Zone Control Register

§pdzcr67: PDZCR67

0x6c - PWM67 Dead Zone Control Register

§per: PER

0x80 - PWM Enable Register

§pgr: [PGR; 4]

0x90..0xa0 - PWM Group[g] Register

§cer: CER

0xc0 - Capture Enable Register

§pcr0: PCR

0x100 - PWM Control Register

§ppr0: PPR

0x104 - PWM Period Register

§pcntr0: PCNTR

0x108 - PWM Count Register

§ppcntr0: PPCNTR

0x10c - PWM Pulse Counter Register

§ccr0: CCR

0x110 - Capture Control Register

§crlr0: CRLR

0x114 - Capture Rise Lock Register

§cflr0: CFLR

0x118 - Capture Fall Lock Register

§pcr1: PCR

0x120 - PWM Control Register

§ppr1: PPR

0x124 - PWM Period Register

§pcntr1: PCNTR

0x128 - PWM Count Register

§ppcntr1: PPCNTR

0x12c - PWM Pulse Counter Register

§ccr1: CCR

0x130 - Capture Control Register

§crlr1: CRLR

0x134 - Capture Rise Lock Register

§cflr1: CFLR

0x138 - Capture Fall Lock Register

§pcr2: PCR

0x140 - PWM Control Register

§ppr2: PPR

0x144 - PWM Period Register

§pcntr2: PCNTR

0x148 - PWM Count Register

§ppcntr2: PPCNTR

0x14c - PWM Pulse Counter Register

§ccr2: CCR

0x150 - Capture Control Register

§crlr2: CRLR

0x154 - Capture Rise Lock Register

§cflr2: CFLR

0x158 - Capture Fall Lock Register

§pcr3: PCR

0x160 - PWM Control Register

§ppr3: PPR

0x164 - PWM Period Register

§pcntr3: PCNTR

0x168 - PWM Count Register

§ppcntr3: PPCNTR

0x16c - PWM Pulse Counter Register

§ccr3: CCR

0x170 - Capture Control Register

§crlr3: CRLR

0x174 - Capture Rise Lock Register

§cflr3: CFLR

0x178 - Capture Fall Lock Register

§pcr4: PCR

0x180 - PWM Control Register

§ppr4: PPR

0x184 - PWM Period Register

§pcntr4: PCNTR

0x188 - PWM Count Register

§ppcntr4: PPCNTR

0x18c - PWM Pulse Counter Register

§ccr4: CCR

0x190 - Capture Control Register

§crlr4: CRLR

0x194 - Capture Rise Lock Register

§cflr4: CFLR

0x198 - Capture Fall Lock Register

§pcr5: PCR

0x1a0 - PWM Control Register

§ppr5: PPR

0x1a4 - PWM Period Register

§pcntr5: PCNTR

0x1a8 - PWM Count Register

§ppcntr5: PPCNTR

0x1ac - PWM Pulse Counter Register

§ccr5: CCR

0x1b0 - Capture Control Register

§crlr5: CRLR

0x1b4 - Capture Rise Lock Register

§cflr5: CFLR

0x1b8 - Capture Fall Lock Register

§pcr6: PCR

0x1c0 - PWM Control Register

§ppr6: PPR

0x1c4 - PWM Period Register

§pcntr6: PCNTR

0x1c8 - PWM Count Register

§ppcntr6: PPCNTR

0x1cc - PWM Pulse Counter Register

§ccr6: CCR

0x1d0 - Capture Control Register

§crlr6: CRLR

0x1d4 - Capture Rise Lock Register

§cflr6: CFLR

0x1d8 - Capture Fall Lock Register

§pcr7: PCR

0x1e0 - PWM Control Register

§ppr7: PPR

0x1e4 - PWM Period Register

§pcntr7: PCNTR

0x1e8 - PWM Count Register

§ppcntr7: PPCNTR

0x1ec - PWM Pulse Counter Register

§ccr7: CCR

0x1f0 - Capture Control Register

§crlr7: CRLR

0x1f4 - Capture Rise Lock Register

§cflr7: CFLR

0x1f8 - Capture Fall Lock Register

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