Struct d1_pac::rtc::dcxo_ctrl::W

pub struct W(/* private fields */);

Register dcxo_ctrl writer

Implementations

impl W

pub fn clk16m_rc_en(&mut self) -> CLK16M_RC_EN_W<'_, 0>

Bit 0 - The related register configuration is necessary to ensure the reset debounce circuit has a stable clock source. The first time SoC starts up, by default, the reset debounce circuit of SoC uses 32K divided by RC16M. In power-off, software reads the related bit to ensure whether EXT32K is working normally, if it is normal, first switch the clock source of debounce circuit to EXT32K, then close RC16M. Without EXT32K scenario or external RTC scenario, software confirms firstly whether EXT32K is working normally before switching, or software does not close RC16M.

pub fn dcxo_en(&mut self) -> DCXO_EN_W<'_, 1>

Bit 1 - DCXO enable

pub fn rsto_dly_sel(&mut self) -> RSTO_DLY_SEL_W<'_, 2>

Bit 2 - For Debug Use Only.

It cannot configure to 0 in normal state.

pub fn dcxo_rfclk_enhance(&mut self) -> DCXO_RFCLK_ENHANCE_W<'_, 4>

Bits 4:5 - DCXO rfclk enhance

Enhance driving capacity of output OUT_RF_REFCLK, 0x0 for 5 pF, 0x1 for 10 pF, 0x2 for 15 pF, 0x3 for 20 pF.

pub fn xtal_mode(&mut self) -> XTAL_MODE_W<'_, 6>

Bit 6 - Xtal mode enable signal, active high

pub fn dcxo_ldo_inrushb(&mut self) -> DCXO_LDO_INRUSHB_W<'_, 7>

Bit 7 - DCXO LDO driving capacity signal, active high

pub fn dcxo_bg(&mut self) -> DCXO_BG_W<'_, 8>

Bits 8:12 - DCXO bandgap output voltage

pub fn dcxo_trim(&mut self) -> DCXO_TRIM_W<'_, 16>

Bits 16:22 - DCXO cap array value

The capacity cell is 55 fF.

pub fn dcxo_ictrl(&mut self) -> DCXO_ICTRL_W<'_, 24>

Bits 24:27 - DCXO current control value

pub fn clk_req_enb(&mut self) -> CLK_REQ_ENB_W<'_, 31>

Bit 31 - Clock REQ enable

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<DCXO_CTRL_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<DCXO_CTRL_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<DCXO_CTRL_SPEC>> for W

fn from(writer: W<DCXO_CTRL_SPEC>) -> Self

Converts to this type from the input type.