Struct d1_pac::tcon_tv0::RegisterBlock
source · #[repr(C)]pub struct RegisterBlock {Show 33 fields
pub tv_gctl: TV_GCTL,
pub tv_gint0: TV_GINT0,
pub tv_gint1: TV_GINT1,
pub tv_src_ctl: TV_SRC_CTL,
pub tv_io_pol: TV_IO_POL,
pub tv_io_tri: TV_IO_TRI,
pub tv_ctl: TV_CTL,
pub tv_basic0: TV_BASIC0,
pub tv_basic1: TV_BASIC1,
pub tv_basic2: TV_BASIC2,
pub tv_basic3: TV_BASIC3,
pub tv_basic4: TV_BASIC4,
pub tv_basic5: TV_BASIC5,
pub tv_debug: TV_DEBUG,
pub tv_ceu_ctl: TV_CEU_CTL,
pub tv_ceu_coef_mul: [TV_CEU_COEF_MUL; 11],
pub tv_ceu_coef_rang: [TV_CEU_COEF_RANG; 3],
pub tv_safe_period: TV_SAFE_PERIOD,
pub tv_fill_ctl: TV_FILL_CTL,
pub tv_fill_begin0: TV_FILL_BEGIN,
pub tv_fill_end0: TV_FILL_END,
pub tv_fill_data0: TV_FILL_DATA,
pub tv_fill_begin1: TV_FILL_BEGIN,
pub tv_fill_end1: TV_FILL_END,
pub tv_fill_data1: TV_FILL_DATA,
pub tv_fill_begin2: TV_FILL_BEGIN,
pub tv_fill_end2: TV_FILL_END,
pub tv_fill_data2: TV_FILL_DATA,
pub tv_data_io_pol0: TV_DATA_IO_POL0,
pub tv_data_io_pol1: TV_DATA_IO_POL1,
pub tv_data_io_tri0: TV_DATA_IO_TRI0,
pub tv_data_io_tri1: TV_DATA_IO_TRI1,
pub tv_pixeldepth_mode: TV_PIXELDEPTH_MODE,
/* private fields */
}Expand description
Register block
Fields§
§tv_gctl: TV_GCTL0x00 - TV Global Control Register
tv_gint0: TV_GINT00x04 - TV Global Interrupt Register0
tv_gint1: TV_GINT10x08 - TV Global Interrupt Register1
tv_src_ctl: TV_SRC_CTL0x40 - TV Source Control Register
tv_io_pol: TV_IO_POL0x88 - TV SYNC Signal Polarity Register
tv_io_tri: TV_IO_TRI0x8c - TV SYNC Signal IO Control Register
tv_ctl: TV_CTL0x90 - TV Control Register
tv_basic0: TV_BASIC00x94 - TV Basic Timing Register0
tv_basic1: TV_BASIC10x98 - TV Basic Timing Register1
tv_basic2: TV_BASIC20x9c - TV Basic Timing Register2
tv_basic3: TV_BASIC30xa0 - TV Basic Timing Register3
tv_basic4: TV_BASIC40xa4 - TV Basic Timing Register4
tv_basic5: TV_BASIC50xa8 - TV Basic Timing Register5
tv_debug: TV_DEBUG0xfc - TV Debug Register
tv_ceu_ctl: TV_CEU_CTL0x100 - TV CEU Control Register
tv_ceu_coef_mul: [TV_CEU_COEF_MUL; 11]0x110..0x13c - TV CEU Coefficient Register0
tv_ceu_coef_rang: [TV_CEU_COEF_RANG; 3]0x140..0x14c - TV CEU Coefficient Register2
tv_safe_period: TV_SAFE_PERIOD0x1f0 - TV Safe Period Register
tv_fill_ctl: TV_FILL_CTL0x300 - TV Fill Data Control Register
tv_fill_begin0: TV_FILL_BEGIN0x304 - TV Fill Data Begin Register
tv_fill_end0: TV_FILL_END0x308 - TV Fill Data End Register
tv_fill_data0: TV_FILL_DATA0x30c - TV Fill Data Value Register
tv_fill_begin1: TV_FILL_BEGIN0x310 - TV Fill Data Begin Register
tv_fill_end1: TV_FILL_END0x314 - TV Fill Data End Register
tv_fill_data1: TV_FILL_DATA0x318 - TV Fill Data Value Register
tv_fill_begin2: TV_FILL_BEGIN0x31c - TV Fill Data Begin Register
tv_fill_end2: TV_FILL_END0x320 - TV Fill Data End Register
tv_fill_data2: TV_FILL_DATA0x324 - TV Fill Data Value Register
tv_data_io_pol0: TV_DATA_IO_POL00x330 - TCON Data IO Polarity Control0
tv_data_io_pol1: TV_DATA_IO_POL10x334 - TCON Data IO Polarity Control1
tv_data_io_tri0: TV_DATA_IO_TRI00x338 - TCON Data IO Enable Control0
tv_data_io_tri1: TV_DATA_IO_TRI10x33c - TCON Data IO Enable Control1
tv_pixeldepth_mode: TV_PIXELDEPTH_MODE0x340 - TV Pixeldepth Mode Control Register