Struct d1_pac::usb1::ehci_capability::hccparams::R

pub struct R(/* private fields */);

Register hccparams reader

Implementations

impl R

pub fn programmable_frame_list_flag(&self) -> PROGRAMMABLE_FRAME_LIST_FLAG_R

Bit 1 - Programmable Frame List Flag

If this bit is set to a zero, then system software must use a frame list length of 1024 elements with this host controller. The USBCMD register Frame List Size field is a read-only register and should be set to zero.

If set to 1, then system software can specify and use the frame list in the USBCMD register Frame List Size field to cofigure the host controller.

The frame list must always aligned on a 4K page boundary. This requirement ensures that the frame list is always physically contiguous.

pub fn asynchronous_schedule_park_capability( &self, ) -> ASYNCHRONOUS_SCHEDULE_PARK_CAPABILITY_R

Bit 2 - Asynchronous Schedule Park Capability

If this bit is set to a one, then the host controller supports the park feature for high-speed queue heads in the Asynchronous Schedule. The feature can be disabled or enabled and set to a specific level by using the Asynchronous Schedule Park Mode Enable and Asynchronous Schedule Park Mode Count fields in the USBCMD register.

pub fn isochronous_scheduling_threshold( &self, ) -> ISOCHRONOUS_SCHEDULING_THRESHOLD_R

Bits 4:7 - Isochronous Scheduling Threshold

This field indicates, relative to the current position of the executing host controller, where software can reliably update the isochronous schedule.

When bit[7] is zero, the value of the least significant 3 bits indicates the number of micro-frames a host controller can hold a set of isochronous data structures(one or more) before flushing the state. When bit[7] is a one, then host software assumes the host controller may cache an isochronous data structure for an entire frame.

pub fn eecp(&self) -> EECP_R

Bits 8:15 - EHCI Extended Capabilities Pointer (EECP)

This optional field indicates the existence of a capabilities list. A value of 00b indicates no extended capabilities are implemented. A non-zero value in this register indicates the offset in PCI configuration space of the first EHCI extended capabiliby. The pointer value must be 40h or greater if implemented to maintain to consistency of the PCI header defined for this calss of device.

Methods from Deref<Target = R<HCCPARAMS_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<HCCPARAMS_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<HCCPARAMS_SPEC>> for R

fn from(reader: R<HCCPARAMS_SPEC>) -> Self

Converts to this type from the input type.