Struct d1_pac::usb1::ohci_control_status_partition::hc_interrupt_enable::R

pub struct R(/* private fields */);

Register hc_interrupt_enable reader

Implementations

impl R

pub fn scheduling_overrun(&self) -> SCHEDULING_OVERRUN_R

Bit 0 - SchedulingOverrun Interrupt Enable

pub fn writeback_done_head(&self) -> WRITEBACK_DONE_HEAD_R

Bit 1 - WritebackDoneHead Interrupt Enable

pub fn start_of_frame(&self) -> START_OF_FRAME_R

Bit 2 - StartofFrame Interrupt Enable

pub fn resume_detected(&self) -> RESUME_DETECTED_R

Bit 3 - ResumeDetected Interrupt Enable

pub fn unrecoverable_error(&self) -> UNRECOVERABLE_ERROR_R

Bit 4 - UnrecoverableError Interrupt Enable

pub fn frame_number_overflow(&self) -> FRAME_NUMBER_OVERFLOW_R

Bit 5 - FrameNumberOverflow Interrupt Enable

pub fn root_hub_status_change(&self) -> ROOT_HUB_STATUS_CHANGE_R

Bit 6 - RootHubStatusChange Interrupt Enable

pub fn master_interrupt_enable(&self) -> MASTER_INTERRUPT_ENABLE_R

Bit 31 - MasterInterruptEnable

A ‘0’ writtern to this field is ignored by HC. A ‘1’ written to this field enables interrupt generation due to events specified in the other bits of this register. This is used by HCD as Master Interrupt Enable.

Methods from Deref<Target = R<HC_INTERRUPT_ENABLE_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<HC_INTERRUPT_ENABLE_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<HC_INTERRUPT_ENABLE_SPEC>> for R

fn from(reader: R<HC_INTERRUPT_ENABLE_SPEC>) -> Self

Converts to this type from the input type.