Type Alias d1_pac::audio_codec::ac_adc_fifoc::RX_FIFO_MODE_W
source · pub type RX_FIFO_MODE_W<'a, const O: u8> = BitWriter<'a, u32, AC_ADC_FIFOC_SPEC, RX_FIFO_MODE_A, O>;
Expand description
Field rx_fifo_mode
writer - RX FIFO Output Mode (Mode 0, 1)
For 20-bit received audio sample:
Mode 0: RXDATA[31:0] = {FIFO_O[19:0], 12’h0}
Mode 1: RXDATA[31:0] = {12{FIFO_O[19]}, FIFO_O[19:0]}
For 16-bit received audio sample:
Mode 0: RXDATA[31:0] = {FIFO_O[19:4], 16’h0}
Mode 1: RXDATA[31:0] = {16{FIFO_O[19]}, FIFO_O[19:4]}
Aliased Type§
struct RX_FIFO_MODE_W<'a, const O: u8> { /* private fields */ }
Implementations§
source§impl<'a, const O: u8> RX_FIFO_MODE_W<'a, O>
impl<'a, const O: u8> RX_FIFO_MODE_W<'a, O>
sourcepub fn e_xpanding_zero(self) -> &'a mut W
pub fn e_xpanding_zero(self) -> &'a mut W
Expanding ‘0’ at LSB of TX FIFO register
sourcepub fn e_xpanding_sign(self) -> &'a mut W
pub fn e_xpanding_sign(self) -> &'a mut W
Expanding received sample sign bit at MSB of TX FIFO register