Struct d1_pac::csic::csic_parser0::csic_prs_ncsic_rx_signal0_dly_adj::R

pub struct R(/* private fields */);

Register csic_prs_ncsic_rx_signal0_dly_adj reader

Implementations

impl R

pub fn pclk_dly(&self) -> PCLK_DLY_R

Bits 0:4 - Pclk_dly 32 Step for adjust, 1 step = 0.2 ns

pub fn hsync_dly(&self) -> HSYNC_DLY_R

Bits 8:12 - Hsync_dly 32 Step for adjust, 1 step = 0.2 ns

pub fn vsync_dly(&self) -> VSYNC_DLY_R

Bits 16:20 - Vsync_dly 32 Step for adjust, 1 step = 0.2 ns

pub fn filed_dly(&self) -> FILED_DLY_R

Bits 24:28 - Filed_dly 32 Step for adjust, 1 step = 0.2 ns

Methods from Deref<Target = R<CSIC_PRS_NCSIC_RX_SIGNAL0_DLY_ADJ_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<CSIC_PRS_NCSIC_RX_SIGNAL0_DLY_ADJ_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<CSIC_PRS_NCSIC_RX_SIGNAL0_DLY_ADJ_SPEC>> for R

fn from(reader: R<CSIC_PRS_NCSIC_RX_SIGNAL0_DLY_ADJ_SPEC>) -> Self

Converts to this type from the input type.