Expand description
DCXO Control Register
Structs§
- DCXO Control Register
- Register
dcxo_ctrl
reader - Register
dcxo_ctrl
writer
Enums§
- The related register configuration is necessary to ensure the reset debounce circuit has a stable clock source. The first time SoC starts up, by default, the reset debounce circuit of SoC uses 32K divided by RC16M. In power-off, software reads the related bit to ensure whether EXT32K is working normally, if it is normal, first switch the clock source of debounce circuit to EXT32K, then close RC16M. Without EXT32K scenario or external RTC scenario, software confirms firstly whether EXT32K is working normally before switching, or software does not close RC16M.
- Clock REQ enable
- DCXO enable
- Xtal mode enable signal, active high
Type Aliases§
- Field
clk16m_rc_en
reader - The related register configuration is necessary to ensure the reset debounce circuit has a stable clock source. The first time SoC starts up, by default, the reset debounce circuit of SoC uses 32K divided by RC16M. In power-off, software reads the related bit to ensure whether EXT32K is working normally, if it is normal, first switch the clock source of debounce circuit to EXT32K, then close RC16M. Without EXT32K scenario or external RTC scenario, software confirms firstly whether EXT32K is working normally before switching, or software does not close RC16M. - Field
clk16m_rc_en
writer - The related register configuration is necessary to ensure the reset debounce circuit has a stable clock source. The first time SoC starts up, by default, the reset debounce circuit of SoC uses 32K divided by RC16M. In power-off, software reads the related bit to ensure whether EXT32K is working normally, if it is normal, first switch the clock source of debounce circuit to EXT32K, then close RC16M. Without EXT32K scenario or external RTC scenario, software confirms firstly whether EXT32K is working normally before switching, or software does not close RC16M. - Field
clk_req_enb
reader - Clock REQ enable - Field
clk_req_enb
writer - Clock REQ enable - Field
dcxo_bg
reader - DCXO bandgap output voltage - Field
dcxo_bg
writer - DCXO bandgap output voltage - Field
dcxo_en
reader - DCXO enable - Field
dcxo_en
writer - DCXO enable - Field
dcxo_ictrl
reader - DCXO current control value - Field
dcxo_ictrl
writer - DCXO current control value - Field
dcxo_ldo_inrushb
reader - DCXO LDO driving capacity signal, active high - Field
dcxo_ldo_inrushb
writer - DCXO LDO driving capacity signal, active high - Field
dcxo_rfclk_enhance
reader - DCXO rfclk enhance - Field
dcxo_rfclk_enhance
writer - DCXO rfclk enhance - Field
dcxo_trim
reader - DCXO cap array value - Field
dcxo_trim
writer - DCXO cap array value - Field
rsto_dly_sel
reader - For Debug Use Only. - Field
rsto_dly_sel
writer - For Debug Use Only. - Field
xtal_mode
reader - Xtal mode enable signal, active high - Field
xtal_mode
writer - Xtal mode enable signal, active high