Struct d1_pac::tcon_lcd0::fsync_gen_dly::W

pub struct W(/* private fields */);

Register fsync_gen_dly writer

Implementations

impl W

pub fn sensor_act1_time(&mut self) -> SENSOR_ACT1_TIME_W<'_, 0>

Bits 0:11 - Delay 0-4095 Pixel clk Period

The actual delay is sensor_act1_time+1.

pub fn sensor_act0_time(&mut self) -> SENSOR_ACT0_TIME_W<'_, 16>

Bits 16:27 - Delay 0-4095 Pixel clk Period

The actual delay is sensor_act0_time+1.

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<FSYNC_GEN_DLY_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<FSYNC_GEN_DLY_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<FSYNC_GEN_DLY_SPEC>> for W

fn from(writer: W<FSYNC_GEN_DLY_SPEC>) -> Self

Converts to this type from the input type.