Struct d1_pac::usb1::ohci_control_status_partition::hc_control::W
source · pub struct W(/* private fields */);
Expand description
Register hc_control
writer
Implementations§
source§impl W
impl W
sourcepub fn control_bulk_service_ratio(
&mut self,
) -> CONTROL_BULK_SERVICE_RATIO_W<'_, 0>
pub fn control_bulk_service_ratio( &mut self, ) -> CONTROL_BULK_SERVICE_RATIO_W<'_, 0>
Bits 0:1 - This specifies the service ratio between Control and Bulk EDs. Before processing any of the nonperiodic lists, HC must compare the ratio specified with its internal count on how many nonempty Control EDs have been processed, in determining whether to continue serving another Control ED or switching to Bulk EDs. The internal count will be retained when crossing the frame boundary. In case of reset, HCD is responsible for restoring this value.
sourcepub fn periodic_list_enable(&mut self) -> PERIODIC_LIST_ENABLE_W<'_, 2>
pub fn periodic_list_enable(&mut self) -> PERIODIC_LIST_ENABLE_W<'_, 2>
Bit 2 - This bit is set to enable the processing of periodic list in the next Frame. If cleared by HCD, processing of the periodic list does not occur after the next SOF. HC must check this bit before it starts processing the list.
sourcepub fn control_list_enable(&mut self) -> CONTROL_LIST_ENABLE_W<'_, 3>
pub fn control_list_enable(&mut self) -> CONTROL_LIST_ENABLE_W<'_, 3>
Bit 3 - This bit is set to enable the processing of the Control list in the next Frame. If cleared by HCD, the processing of the Control list does not occur after the next SOF. HC must check this bit whenever it determines to process the list. When disabled, HCD may modify the list. If HcControlCurrentED is pointing to an ED to be removed, HCD must advance the pointer by updating HcControlCurrentED before re-enabling processing of the list.
sourcepub fn isochronous_enable(&mut self) -> ISOCHRONOUS_ENABLE_W<'_, 3>
pub fn isochronous_enable(&mut self) -> ISOCHRONOUS_ENABLE_W<'_, 3>
Bit 3 - This bit is used by HCD to enable/disable processing of isochronous EDs. While processing the periodic list in a Frame, HC checks the status of this bit when it finds an Isochronous ED (F=1). If set (enabled), HC continues processing the EDs. If cleared (disabled), HC halts processing of the periodic list (which now contains only isochronous EDs) and begins processing the Bulk/Control lists. Setting this bit is guaranteed to take effect in the next Frame (not the current Frame).
sourcepub fn bulk_list_enable(&mut self) -> BULK_LIST_ENABLE_W<'_, 5>
pub fn bulk_list_enable(&mut self) -> BULK_LIST_ENABLE_W<'_, 5>
Bit 5 - This bit is set to enable the processing of the Bulk list in the next Frame. If cleared by HCD, the processing of the Bulk list does not occur after the next SOF. HC checks this bit whenever it determines to process the list. When disabled, HCD may modify the list. If HcBulkCurrentED is pointing to an ED to be removed, HCD must advance the pointer by updating HcBulkCurrentED before re-enabling processing of the list.
sourcepub fn host_controller_functional_state_for_usb(
&mut self,
) -> HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_W<'_, 6>
pub fn host_controller_functional_state_for_usb( &mut self, ) -> HOST_CONTROLLER_FUNCTIONAL_STATE_FOR_USB_W<'_, 6>
Bits 6:7 - A transition to USBOperational from another state causes SOF generation to begin 1 ms later. HCD may determine whether HC has begun sending SOFs by reading the StartoFrame field of HcInterruptStatus.
This field may be changed by HC only when in the USBSUSPEND state. HC may move from the USBSUSPEND state to the USBRESUME state after detecting the resume signaling from a downstream port.
HC enters USBSUSPEND after a software reset, whereas it enters USBRESET after a hardware reset. The latter also resets the Root Hub and asserts subsequent reset signaling to downstream ports.
sourcepub fn interrupt_routing(&mut self) -> INTERRUPT_ROUTING_W<'_, 8>
pub fn interrupt_routing(&mut self) -> INTERRUPT_ROUTING_W<'_, 8>
Bit 8 - InterruptRouting This bit determines the routing of interrupts generated by events registered in HcInterruptStatus. If clear, all interrupt are routed to the normal host bus interrupt mechanism. If set interrupts are routed to the System Management Interrupt. HCD clears this bit upon a hardware reset, but it does not alter this bit upon a software reset. HCD uses this bit as a tag to indicate the ownership of HC.
sourcepub fn remote_wakeup_connected(&mut self) -> REMOTE_WAKEUP_CONNECTED_W<'_, 9>
pub fn remote_wakeup_connected(&mut self) -> REMOTE_WAKEUP_CONNECTED_W<'_, 9>
Bit 9 - This bit indicates whether HC supports remote wakeup signaling. If remote wakeup is supported and used by the system, it is the responsibility of system firmware to set this bit during POST. HC clear the bit upon a hardware reset but does not alter it upon a software reset. Remote wakeup signaling of the host system is host-bus-specific and is not described in this specification.
sourcepub fn remote_wakeup_enable(&mut self) -> REMOTE_WAKEUP_ENABLE_W<'_, 10>
pub fn remote_wakeup_enable(&mut self) -> REMOTE_WAKEUP_ENABLE_W<'_, 10>
Bit 10 - This bit is used by HCD to enable or disable the remote wakeup feature upon the detection of upstream resume signaling. When this bit is set and the ResumeDetected bit in HcInterruptStatus is set, a remote wakeup is signaled to the host system. Setting this bit has no impact on the generation of hardware interrupt.